| 1. |
- Magnusson, Peter S., et al.
(author)
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SimICS/sun4m : A virtual workstation
- 2019
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In: USENIX 1998 Annual Technical Conference. - New Orleans, LA, USA : USENIX Association.
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Conference paper (peer-reviewed)abstract
- System level simulators allow computer architects and system software designers to recreate an accurate and complete replica of the program behavior of a target system, regardless of the availability, existence, or instrumentation support of such a system. Applications include evaluation of architectural design alternatives as well as software engineering tasks such as traditional debugging and performance tuning. We present an implementation of a simulator acting as a virtual workstation fully compatible with the sun4m architecture from Sun Microsystems. Built using the system-level SPARC V8 simulator SimICS, SimICS/sun4m models one or more SPARC V8 processors, supports user-developed modules for data cache and instruction cache simulation and execution profiling of all code, and provides a symbolic and performance debugging environment for operating systems. SimICS/sun4m can boot unmodified operating systems, including Linux 2.0.30 and Solaris 2.6, directly from snapshots of disk partitions. To support essentially arbitrary code, we implemented binary-compatible simulators for several devices, including SCSI, console, interrupt, timers, EEPROM, and Ethernet. The Ethernet simulation hooks into the host and allows the virtual workstation to appear on the local network with full services available (NFS, NIS, rsh, etc). Ethernet and console traffic can be recorded for future playback. The performance of SimICS/sun4m is sufficient to run realistic workloads, such as the database benchmark TPC-D, scaling factor 1/100, or an interactive network application such as Mozilla. The slowdown in relation to native hardware is in the range of 25 to 75 (measured using SPECint95). We also demonstrate some applications, including modeling an 8-processor sun4m version (which does not exist), modeling future memory hierarchies, and debugging an operating system.
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| 2. |
- Westphal, Florian, et al.
(author)
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A case for guided machine learning
- 2019
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In: Machine learning and knowledge extraction. - Cham : Springer. - 9783030297251 - 9783030297268 ; , s. 353-361
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Conference paper (peer-reviewed)abstract
- Involving humans in the learning process of a machine learning algorithm can have many advantages ranging from establishing trust into a particular model to added personalization capabilities to reducing labeling efforts. While these approaches are commonly summarized under the term interactive machine learning (iML), no unambiguous definition of iML exists to clearly define this area of research. In this position paper, we discuss the shortcomings of current definitions of iML and propose and define the term guided machine learning (gML) as an alternative.
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| 3. |
- Abghari, Shahrooz, et al.
(author)
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Higher order mining for monitoring district heating substations
- 2019
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In: Proceedings - 2019 IEEE International Conference on Data Science and Advanced Analytics, DSAA 2019. - : Institute of Electrical and Electronics Engineers (IEEE). - 9781728144931 ; , s. 382-391
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Conference paper (peer-reviewed)abstract
- We propose a higher order mining (HOM) approach for modelling, monitoring and analyzing district heating (DH) substations' operational behaviour and performance. HOM is concerned with mining over patterns rather than primary or raw data. The proposed approach uses a combination of different data analysis techniques such as sequential pattern mining, clustering analysis, consensus clustering and minimum spanning tree (MST). Initially, a substation's operational behaviour is modeled by extracting weekly patterns and performing clustering analysis. The substation's performance is monitored by assessing its modeled behaviour for every two consecutive weeks. In case some significant difference is observed, further analysis is performed by integrating the built models into a consensus clustering and applying an MST for identifying deviating behaviours. The results of the study show that our method is robust for detecting deviating and sub-optimal behaviours of DH substations. In addition, the proposed method can facilitate domain experts in the interpretation and understanding of the substations' behaviour and performance by providing different data analysis and visualization techniques.
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| 4. |
- Behnam, Moris, et al.
(author)
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Towards an efficient approach for resource sharing in real-time multiprocessor systems
- 2011
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In: 2011 6th IEEE International Symposium on Industrial and Embedded Systems. - Västerås : IEEE. - 9781612848181 - 9781612848198 ; , s. 99-102, s. 99-102
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Conference paper (peer-reviewed)abstract
- Supporting resource sharing in multiprocessor architectures is one of the major problems that limit the potential performance benefits of using such architectures for real-time systems. Many approaches and algorithms have been proposed to support resource sharing, however, most of them impose either high blocking times on tasks or require a large memory allocation. In this paper we investigate the possibility of combining the lock-based approaches and wait-free approaches (using multiple buffers) in order to decrease both the blocking times that may affect the schedulability of tasks and the required memory. To achieve this, we propose a solution based on evaluating the maximum allowed blocking time on each task according to the schedulability analysis, and then find the minimum memory allocation for each resource that limits the blocking times on tasks to be less than the maximum allowed blocking times.
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| 5. |
- Iqbal, Syed Muhammad Zeeshan, et al.
(author)
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A parallel heuristic for fast train dispatching during railway traffic disturbances : Early results
- 2012
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Conference paper (peer-reviewed)abstract
- Railways are an important part of the infrastructure in most countries. As the railway networks become more and more saturated, even small traffic disturbances can propagate and have severe consequences. Therefore, efficient re-scheduling support for the traffic managers is needed. In this paper, the train real-time re-scheduling problem is studied in order to minimize the total delay, subject to a set of safety and operational constraints. We propose a parallel greedy algorithm based on a depth-first branch-and-bound search strategy. A number of comprehensive numerical experiments are conducted to compare the parallel implementation to the sequential implementation of the same algorithm in terms of the quality of the solution and the number of nodes evaluated. The comparison is based on 20 disturbance scenarios from three different types of disturbances. Our results show that the parallel algorithm; (i) efficiently covers a larger portion of the search space by exchanging information about improvements, and (ii) finds better solutions for more complicated disturbances such as infrastructure problems. Our results show that the parallel implementation significantly improves the solution for 5 out of 20 disturbance scenarios, as compared to the sequential algorithm.
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| 6. |
- Martinsen, Jan Kasper, et al.
(author)
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A Methodology for Evaluating JavaScript Execution Behavior in Interactive Web Applications
- 2011
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In: [Host publication title missing]. - Sharm El-Sheikh, Egypt : IEEE. - 2161-5322. - 9781457704758 ; , s. 241-248
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Conference paper (peer-reviewed)abstract
- JavaScript has gone from being a mechanism for providing dynamic web pages to an important component of many web applications. Currently one of the most popular type of web applications is so-called social networks, e.g., Facebook, Twitter, and MySpace. However, the workload and execution behavior of JavaScript in this context have not been fully explored or understood. In this paper we present a methodology for characterizing the JavaScript execution behavior in interactive web applications using deterministic execution of use cases. Then, we apply this methodology to evaluate a set of social network applications and compare their behavior to a set of established JavaScript benchmarks. Our results confirm previous studies that the execution behavior of social networks differ from established benchmarks. In addition, we identify one novel difference not published before, i.e., the use of anonymous functions in web applications.
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| 7. |
- Martinsen, Jan Kasper, et al.
(author)
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Preliminary Results of Combining Thread-Level Speculation and Just-in-Time Compilation in Google’s V8
- 2013
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Conference paper (peer-reviewed)abstract
- We present the first implementation of Thread-Level Speculation in combination with Just-in-time compilation. The implementation is done in Google’s V8, a well-known JavaScript engine, and evaluated on 15 popular web application executing on 2, 4, and 8 core computers. Our results show an average speedup of 2.9 on 4 cores, without any JavaScript code modifications. Further, we have found that the Just-in-time compilation time is significant, and that most functions are lazily compiled (approximately 80%) and that V8 contains features that are advantageous in Thread-Level Speculation.
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| 8. |
- Martinsen, Jan Kasper, et al.
(author)
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Reducing Memory in Software-Based Thread-Level Speculation for JavaScript Virtual Machine Execution of Web Applications
- 2014
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In: 2014 IEEE INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, 2014 IEEE 6TH INTL SYMP ON CYBERSPACE SAFETY AND SECURITY, 2014 IEEE 11TH INTL CONF ON EMBEDDED SOFTWARE AND SYST (HPCC,CSS,ICESS). - : Elsevier. - 9781479961238 ; , s. 181-184
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Conference paper (peer-reviewed)abstract
- Thread-Level Speculation has been used to take advantage of multicore processors in virtual execution environments for the sequential JavaScript scripting language. While the results are promising the memory overhead is high. Here we propose to reduce the memory usage by limiting the checkpoint depth based on an in-depth study of the memory and execution time effects. We also propose an adaptive heuristic to dynamically adjust the checkpoints. We evaluate this using 15 web applications on an 8-core computer. The results show that the memory overhead is reduced for Thread-Level Speculation by over 90% as compared to storing all checkpoints. Further, the performance is often better than when storing all the checkpoints and at worst 4% slower.
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| 9. |
- Martinsen, Jan Kasper, et al.
(author)
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The Effect of Thread-Level Speculation on a Set of Well-known Web Applications
- 2011
-
Conference paper (peer-reviewed)abstract
- Previous studies have shown that there are large differences between the workload of established JavaScript benchmarks and popular Web Applications. It has also been shown that popular optimization techniques, such as just-in-time compilation, many times degrade the performance of Web Applications. Further, since JavaScript is a sequential language it cannot take advantage of multicore processors. In this paper, we propose to use Thread-Level Speculation (TLS) as an alternative optimization technique for Web Applications written in JavaScript. Our TLS approach is based on speculation at the function level. We have implemented TLS in WebKit, a state-of-the-art web browser and JavaScript engine. Our results show speedups between 2 and 8 on eight cores for seven popular Web Applications, without any JavaScript source code changes at all. The results also show few roll-backs and the additional memory requirements for our speculation is up to 17.8 MB for the studied Web Applications.
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| 10. |
- Nilsson, Eric, et al.
(author)
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Accelerating Graphics in the Simics Full-System Simulator
- 2015
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Conference paper (peer-reviewed)abstract
- Virtual platforms provide benefits to developers in terms of a more rapid development cycle since development may begin before next-generation hardware is available. However, there is a distinct lack of graphics virtualization in industry-grade virtual platforms, leading to performance issues that may reduce the benefits virtual platforms otherwise have over execution on actual hardware. This paper demonstrates graphics acceleration by the means of paravirtualizing OpenGL ES in the Wind River Simics full-system simulator. We propose a solution for paravirtualized graphics using magic instructions to share memory between target and host systems, and present an implementation utilizing this method. The study illustrates the benefits and drawbacks of paravirtualized graphics acceleration and presents a performance analysis of strengths and weaknesses compared to software rasterization. Additionally, benchmarks are devised to stress key aspects in the solution, such as communication latency and computationally intensive applications. We assess paravirtualization as a viable method to accelerate graphics in system simulators, this reduces frame times up to 34 times compared to that of software rasterization. Furthermore, magic instructions are identified as the primary bottleneck of communication latency in the implementation.
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