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A performance and e...
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Collin, MikaelKTH,Programvaru- och datorsystem, SCS
(författare)
A performance and energy exploration of dictionary code compression architectures
- Artikel/kapitelEngelska2011
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IEEE conference proceedings,2011
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LIBRIS-ID:oai:DiVA.org:kth-89621
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https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-89621URI
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https://doi.org/10.1109/IGCC.2011.6008584DOI
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Språk:engelska
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Sammanfattning på:engelska
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© 2011 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. QC 20120215
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We have made a performance and energy exploration of a previously proposed dictionary code compression mechanism where frequently executed individual instructions and/or sequences are replaced in memory with short code words. Our simulated design shows a dramatically reduced instruction memory access frequency leading to a performance improvement for small instruction cache sizes and to significantly reduced energy consumption in the instruction fetch path. We have evaluated the performance and energy implications of three architectural parameters: branch prediction accuracy, instruction cache size and organization. To asses the complexity of the design we have implemented the critical stages in VHDL.
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Brorsson, Mats,1962-KTH,Programvaru- och datorsystem, SCS,Kista Multicore Center(Swepub:kth)u1dkd5v9
(författare)
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Öberg, JohnnyKTH,Elektroniksystem(Swepub:kth)u1t0l5al
(författare)
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KTHProgramvaru- och datorsystem, SCS
(creator_code:org_t)
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Ingår i:2011 International Green Computing Conference and Workshops (IGCC): IEEE conference proceedings, s. 1-89781457712227
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