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Lowering Power Cons...
Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style
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Hemani, Ahmed (författare)
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Meincke, Thomas (författare)
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Postula, Adam (författare)
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- Olsson, Thomas (författare)
- Lund University,Lunds universitet,Institutioner vid LTH,Lunds Tekniska Högskola,Departments at LTH,Faculty of Engineering, LTH
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- Nilsson, Peter (författare)
- Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
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Öberg, Johnny (författare)
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Ellervee, Peeter (författare)
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Lindqvist, Dan (författare)
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(creator_code:org_t)
- 1999-06
- 1999
- Engelska.
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Ingår i: Proceedings of the 36th ACM/IEEE conference on Design automation. - New York, NY, USA : ACM. ; , s. 873-878
- Relaterad länk:
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http://dx.doi.org/10...
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https://lup.lub.lu.s...
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https://doi.org/10.1...
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Abstract
Ämnesord
Stäng
- Power consumption in clock of large high performance VLSIs can be reduced by adopting Globally Asynchronous, Locally Synchronous design style (GALS). GALS has small overheads for the global asynchronous communication and local clock generation. We propose methods to a) evaluate the benefits of GALS and account for its overheads, which can be used as the basis for partitioning the system into optimal number/size of synchronous blocks, and b) automate the synthesis of the global asynchronous communication. Three realistic ASICs, ranging in complexity from 1 to 3 million gates, were used to evaluate GALS benefits and overheads. The results show an average power saving of about 70% in clock with negligible overheads.
Ämnesord
- TEKNIK OCH TEKNOLOGIER -- Elektroteknik och elektronik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)
Publikations- och innehållstyp
- kon (ämneskategori)
- ref (ämneskategori)