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- Chilo, José, 1960-, et al.
(author)
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A flexible electronic nose for odor discrimination using different methods of classification
- 2009
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In: 2009 16th IEEE-NPSS Real Time Conference - Conference Record. - New York : IEEE. - 9781424444557 ; , s. 317-320, s. 317-320
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Conference paper (peer-reviewed)abstract
- Ovarian cancer is one of the leading causes of death from cancer in women. The lifetime risk is around 1.5%, which makes it the second most common gynecologic malignancy (the first one being breast cancer). To have a definitive diagnose, a surgical procedure is generally required and suspicious areas (samples) will be removed and sent for microscopic and other analysis. This paper describes the result of a pilot study in which an electronic nose is used to "smell" the aforementioned samples, analyze the multi-sensor signals and have a close to real-time answer on the detection of cancer. Besides being fast, the detection method is inexpensive and simple. Experimental analysis using real ovarian carcinoma samples shows that the use of proper algorithms for analysis of the multi-sensor data from the electronic nose yielded surprisingly good results with more than 77% classification rate. The electronic nose used in this pilot study was originally developed to be used as a "bomb dog" and can distinguish between e.g. TNT, Dynamex, Prillit. However, it was constructed to be a flexible multi-sensor device and the individual (16) sensors can easily be replaced/exchanged. This is suggestive for further investigations to obtain even better results with new, specific sensors. In another pilot experiment, headspace of an ovarian carcinoma sample and a control sample were analyzed using gas chromatography-mass spectrometry. Significant differences in chemical composition and compound levels were recorded, which would explain the different response obtained with the electronic nose.
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2. |
- Liu, Ming, et al.
(author)
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Trigger algorithm development on FPGA-based Compute Nodes
- 2009
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In: 2009 16th IEEE-NPSS Real Time Conference. - New York : IEEE. - 9781424457960 ; , s. 478-484
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Conference paper (peer-reviewed)abstract
- Based on the ATCA computation architecture and Compute Nodes (CN), investigation and implementation work has been being executed for HADES and PANDA trigger algorithms. We present our designs for HADES track reconstruction processing, Cherenkov ring recognition, Time-Of-Flight processing, electromagnetic shower recognition.. and the PANDA straw tube tracking algorithm. They will appear as co-processors in the uniform system design to undertake the detector-specific computing. The algorithm principles will be explained and hardware designs are described in the paper. The current progress reveals the feasibility to implement these algorithms on FPGAs. Also experimental results demonstrate the performance speedup when compared to alternative software solutions, as well as the potential capability of high-speed parallel/pipelined processing in Data Acquisition and Trigger systems.
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3. |
- Wang, Qiang, et al.
(author)
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Hardware/Software Co-design of an ATCA-based Computation Platform for Data Acquisition and Triggering
- 2009
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In: 16th IEEE NPSS Real Time Conference. - 9781424457960 ; , s. 485-489
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Conference paper (peer-reviewed)abstract
- An ATCA-based computation platform for data acquisition and trigger(TDAQ) applications has been developed for multiple future projects such its PANDA. HADES, and BESIII. Each Compute Node (CN) appears as one (if the fourteen Field Replaceable Units (FRU) in an ATCA shelf, which in total features a high performance of 1890 Clips inter-FPGA on-board channels, 1456 Gbps inter-board backplane connections, 728 Gbps full-duplex optical links, 70 Gbps Ethernet. 140 GBytes DDR2 SDRAM. and all computing resources of 70 Xilinx Virtex-4 FX60 FPGAs. Corresponding to (the system architecture, a hardware/software co-design approach is proposed to ease and accelerate the development for different experiments. In the uniform system design. application-specific computation is to be implemented as customized hardware co-processors, while the embedded PowerPC processor takes charge of flexible slow controls and transmission protocol processing.
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