| 1. |
- Pu, X., et al.
(author)
-
An 8-channel readout front-end for long-term sleep quality monitoring
- 2011
-
In: 2011 IEEE Biomedical Circuits and Systems Conference, BioCAS 2011. - San Diego, CA : IEEE Press. - 9781457714696 ; , s. 385-388
-
Conference paper (peer-reviewed)abstract
- An 8-channel readout front-end (RFE) for long-term sleep quality monitoring is presented in this paper and features high common-mode rejection ratio (CMRR) and low input referred noise. Each channel is composed of an AC coupled instrumentation amplifier (IA) with chopping spike filter (CSF), a programmable gain amplifier (PGA), and a buffer, while the bias generator and non-overlapping clock are shared by all channels. The proposed circuit, built in standard 0.35 μ m CMOS technology, consumes 101 μ A from 2.7 V, while occupying 5 mm 2 of chip area. According to the simulation, the AC coupled IA's CMRR is 118 dB and input referred noise is merely 0.55 μ Vrms. Meanwhile, the RFE is digitally programmable for different applications.
|
|
| 2. |
- Razzaghpour, Milad, et al.
(author)
-
A Highly-Accurate Low-Power CMOS Potentiostat for Implantable BioSensors
- 2011
-
In: Biomedical Circuits and Systems Conference (BioCAS), 2011 IEEE. - 9781457714696 ; , s. 5-8
-
Conference paper (peer-reviewed)abstract
- Current-mirror-based potentiostats suffer from sys-tematic and random errors causing offset, gain and linearityerror in reading out the sensor data. In this work, a newpotentiostat topology is proposed to eliminate the systematicerror via an error-cancellation loop. The loop takes advantageof an error-tracking amplifier connected to a transimpedanceamplifier with adjustable input common-mode voltage. Due tothe enhanced loop gain, the potentiostat is able to accuratelycopy the sensor current which will then be converted into theproportional voltage. Additionally, a theoretical discussion ofthe proposed topology is given and a thorough study on theeffect of random error sources is carried out. The potentiostat isdesigned and simulated in a 150nm CMOS process. The resultsverify a highly-linear highly-accurate performance in a low-noisecondition, while consuming only 32 μW.
|
|
