| 1. |
- Bengtsson, Bengt Olle, et al.
(author)
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Den första festen
- 2011
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In: Konstellationer. - 9789173535274 ; , s. 119-129
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Book chapter (pop. science, debate, etc.)
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| 2. |
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| 3. |
- Bengtsson, Bengt Olle, et al.
(author)
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Bengt Lidforss 1868-1913
- 2017
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In: En lundensisk litteraturhistoria. : Lunds universitet som litterärt kraftfält - Lunds universitet som litterärt kraftfält. - 9789170612503 ; , s. 146-151
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Book chapter (pop. science, debate, etc.)
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| 4. |
- Bengtsson, Bengt Olle, et al.
(author)
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Mellan natur och kultur
- 2011
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In: Lunds universitets kokbok. - 9789173534741 ; , s. 196-197
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Book chapter (pop. science, debate, etc.)abstract
- Abstract is not available.
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| 5. |
- Bengtsson, Bengt Olle, et al.
(author)
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Rävens politik
- 2008
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In: Universitetets frihet.. - 9789163324109 ; , s. 81-88
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Book chapter (pop. science, debate, etc.)abstract
- Abstract is not available
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| 6. |
- Bengtsson, Bengt Olle, et al.
(author)
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Åke Gustafsson 1908-1988
- 2017
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In: En lundensisk litteraturhistoria. : Lunds universitet som litterärt kraftfält - Lunds universitet som litterärt kraftfält. - 9789170612503 ; , s. 239-240
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Book chapter (pop. science, debate, etc.)
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| 7. |
- Faxén, Karl-Filip, et al.
(author)
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Multicore computing--the state of the art
- 2009
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Reports (other academic/artistic)abstract
- This document presents the current state of the art in multicore computing, in hardware and software, as well as ongoing activities, especially in Sweden. To a large extent, it draws on the presentations given at the Multicore Days 2008 organized by SICS, Swedish Multicore Initiative and Ericsson Software Research but the published literature and the experience of the authors has been equally important sources. It is clear that multicore processors will be with us for the foreseeable future; there seems to be no alternative way to provide substantial increases of microprocessor performance in the coming years. While processors with a few (2–8) cores are common today, this number is projected to grow as we enter the era of manycore computing. The road ahead for multicore and manycore hardware seems relatively clear, although some issues like the organization of the on-chip memory hierarchy remain to be settled. Multicore software is however much less mature, with fundamental questions of programming models, languages, tools and methodologies still outstanding.
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| 8. |
- Khan, Muneeb, 1985-
(author)
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Optimizing Performance in Highly Utilized Multicores with Intelligent Prefetching
- 2016
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Doctoral thesis (other academic/artistic)abstract
- Modern processors apply sophisticated techniques, such as deep cache hierarchies and hardware prefetching, to increase performance. Such complex hardware structures have helped improve performance in general, however, their full potential is not realized as software often utilizes the memory hierarchy inefficiently. Performance can be improved further by ensuring careful interaction between software and hardware. Performance can typically improve by increasing the cache utilization and by conserving the DRAM bandwidth, i.e., retaining more useful data in the caches and lowering data requests to the DRAM. One way to achieve this is to conserve space across the cache hierarchy and increase opportunity for temporal reuse of cached data. Similarly, conserving the DRAM bandwidth is essential for performance in highly utilized multicores, as it can easily become a critical resource. When multiple cores are active and the per-core share of DRAM bandwidth shrinks, its efficient utilization plays an important role in improving the overall performance. Together the cache hierarchy and the DRAM bandwidth play a significant role in defining the overall performance in multicores.Based on deep insight from memory behavior modeling of software, this thesis explores five software-only methods to analyze and increase performance in multicores. The underlying philosophy that drives these techniques is to increase cache utilization and conserve DRAM bandwidth by 1) focusing on making data prefetching more accurate, and 2) lowering the miss rate in the cache hierarchy either by preserving useful data longer by cache-bypassing the less useful data or via code size compaction using compiler options. First, we show how microarchitecture-independent memory access profiles can be used to analyze the Instruction Cache performance of software. We use this information in a compiler pass to recompile application phases (with large Instruction cache miss rate) for smaller code size in an effort to improve the application Instruction Cache behavior. Second, we demonstrate how a resourceefficient software prefetching method can be combined with hardware prefetching to improve performance in multicores when running software that exhibits irregular memory access patterns. Third, we show that hardware prefetching on high performance commodity multicores is sub-optimal and demonstrate how a resource-efficient software-only prefetching method can perform better in fully utilized multicores. Fourth, we present an adaptive prefetching approach that dynamically combines software and hardware prefetching in a runtime system to improve performance in highly utilized multicores. Finally, in the fifth work we develop a method to predict per-core prefetching configurations that deliver near-optimal overall multicore performance. These software techniques enable us to tap greater performance in multicores (up to 50%), without requiring more processing resources.
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| 9. |
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| 10. |
- Kiisk, Madis, et al.
(author)
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The charge state distribution of a carbon beam measured at the lund pelletron accelerator with the newly installed terminal pumping system in use
- 2002
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In: Nuclear Instruments & Methods in Physics Research. Section A: Accelerators, Spectrometers, Detectors, and Associated Equipment. - 0167-5087. ; 481:1-3, s. 1-8
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Journal article (peer-reviewed)abstract
- Charge state distributions for (12) C and C-13 ions have been measured at the Lund Pelletron tandem accelerator for the N-2 gas stripper with a newly installed terminal pumping system in use. A comparison of the results obtained for the ion energies between 1.5 and 2.8 MeV with the foil stripper and the gas stripper without terminal pumping demonstrates the great improvement of the stripping process achieved with the new terminal pumping. (C) 2002 Elsevier Science B.V. All rights reserved.
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