| 1. |
- Persson, Anton E.O., et al.
(author)
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Reduced annealing temperature for ferroelectric HZO on InAs with enhanced polarization
- 2020
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In: Applied Physics Letters. - : AIP Publishing. - 0003-6951 .- 1077-3118. ; 116:6
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Journal article (peer-reviewed)abstract
- Deposition, annealing, and integration of ferroelectric Hf x Zr 1 - x O 2 (HZO) thin films on the high-mobility semiconductor InAs using atomic layer deposition are investigated. Electrical characterization reveals that the HZO films on InAs exhibit an enhanced remanent polarization compared to films formed on a reference TiN substrate, exceeding 20 μ C / cm 2 even down to an annealing temperature of 370 °C. For device applications, the thermal processes required to form the ferroelectric HZO phase must not degrade the high-κ/InAs interface. We find by evaluation of the capacitance-voltage characteristics that the electrical properties of the high-κ/InAs are not significantly degraded by the annealing process, and high-resolution transmission electron microscopy verifies a maintained sharp high-κ/InAs interface.
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| 2. |
- Andersen, André, et al.
(author)
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As-deposited ferroelectric HZO on a III–V semiconductor
- 2022
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In: Applied Physics Letters. - : AIP Publishing. - 0003-6951 .- 1077-3118. ; 121:1, s. 012901-012901
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Journal article (peer-reviewed)abstract
- By electrical characterization of thin films deposited by atomic layer deposition, HfxZr1−xO2 (HZO) is shown to be ferroelectric as-deposited, i.e., without any annealing step, using a thermal budget of 300 °C. By fabricating laminated HZO films rather than the traditional solid-solution HZO, a remanent polarization of Pr = 11 μC/cm2 and endurance exceeding 106 are obtained. Films grown on thermally reactive InAs semiconductor substrates showed capacitance–voltage modulation and hysteresis, which varied depending on interfacial oxide construction. Additionally, a trade-off between higher polarization and lower gate leakage was found when comparing different laminate structures and deposition temperatures. Scaling the thickness of the laminated oxides revealed that films remain ferroelectric at 6.5 nm with an increased breakdown field for thinner devices.
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| 3. |
- Athle, Robin, et al.
(author)
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Effects of TiN Top Electrode Texturing on Ferroelectricity in Hf1-xZrxO2
- 2021
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In: ACS applied materials & interfaces. - : American Chemical Society (ACS). - 1944-8244 .- 1944-8252. ; 13:9, s. 11089-11095
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Journal article (peer-reviewed)abstract
- Ferroelectric memories based on hafnium oxide are an attractive alternative to conventional memory technologies due to their scalability and energy efficiency. However, there are still many open questions regarding the optimal material stack and processing conditions for reliable device performance. Here, we report on the impact of the sputtering process conditions of the commonly used TiN top electrode on the ferroelectric properties of Hf1-xZrxO2. By manipulating the deposition pressure and chemistry, we control the preferential orientation of the TiN grains between (111) and (002). We observe that (111) textured TiN is superior to (002) texturing for achieving high remanent polarization (Pr). Furthermore, we find that additional nitrogen supply during TiN deposition leads to >5× greater endurance, possibly by limiting the scavenging of oxygen from the Hf1-xZrxO2 film. These results help explain the large Pr variation reported in the literature for Hf1-xZrxO2/TiN and highlights the necessity of tuning the top electrode of the ferroelectric stack for successful device implementation.
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| 4. |
- Athle, Robin, et al.
(author)
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Improved Endurance of Ferroelectric HfxZr1–xO2 Integrated on InAs Using Millisecond Annealing
- 2022
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In: Advanced Materials Interfaces. - : Wiley. - 2196-7350. ; 9:27
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Journal article (peer-reviewed)abstract
- Ferroelectric HfxZr1–xO2 (HZO) is typically achieved by crystallization of an amorphous thin film via rapid thermal processing (RTP) at time scales of seconds to minutes. For integration on III–V semiconductors, this approach can severely degrade the sensitive HZO/III–V interface. To evaluate whether a reduced thermal budget can improve the interface quality, millisecond duration thermal anneals are utilized using a flash lamp annealer (FLA) on HZO/InAs capacitors. Through thorough electrical characterization such as polarization hysteresis, endurance, and capacitance-voltage measurements, as well as synchrotron-based chemical interface characterization, the FLA and RTP treatments are compared and the FLA results are found in lower interface defect density and higher endurance, but also have generally lower remanent polarization (Pr) compared to RTP. Additionally, ways to achieve high Pr and low interface defect density using multiple lower energy flashes, as well as by pre-crystallization during the ALD growth step are investigated. Using FLA, Pr exceeding 20 µC cm−2 is achieved, with extended endurance properties compared to RTP treatment and a considerably decreased defect density, indicative of a higher quality HZO/InAs interface. This work presents valuable insight into the successful integration of ferroelectric HZO on low thermal budget III–V semiconductors.
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| 5. |
- Athle, Robin, et al.
(author)
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Top Electrode Engineering for Freedom in Design and Implementation of Ferroelectric Tunnel Junctions Based on Hf1- xZrxO2
- 2022
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In: ACS Applied Electronic Materials. - : American Chemical Society (ACS). - 2637-6113. ; 4:3, s. 1002-1009
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Journal article (peer-reviewed)abstract
- Ferroelectric tunnel junctions (FTJs) based on ultrathin HfO2 have great potential as a fast and energy-efficient memory technology compatible with complementary metal oxide semiconductors. FTJs consist of a ferroelectric film sandwiched between two distinct electrodes, the properties of which are intricately linked to the electrical properties of the FTJs. Here we utilize a W crystallization electrode (CE) to achieve a high and reproducible remanent polarization, combined with a metal replacement process in which the W is carefully removed and replaced by another top electrode (TE). In this way we separate the ferroelectric film properties from the device design and can thereby evaluate the effect of the TE work function (WF) and conduction band electron density (ne) on the tunneling electroresistance (TER) and device reliability. We compare FTJs designed with a TiN bottom electrode and W, Cr, or Ni TE and find that the use of high electron density metals such as Ni or Cr as TE allows for an improved TER, albeit at the cost of reliability due to a large built-in electric field. To bypass this effect, a bilayer Cr/Ni TE is implemented, which allows for a high TER and minimal built-in field, leading to excellent retention and endurance beyond 108 cycles. The results presented here thus highlight a process flow for reliable design and implementation of FTJs.
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| 6. |
- Dahlberg, Hannes, et al.
(author)
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Ferroelectric-Antiferroelectric Transition of Hf1- xZrxO2on Indium Arsenide with Enhanced Ferroelectric Characteristics for Hf0.2Zr0.8O2
- 2022
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In: ACS Applied Electronic Materials. - : American Chemical Society (ACS). - 2637-6113. ; 4:12, s. 6357-6363
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Journal article (peer-reviewed)abstract
- The ferroelectric (FE)-antiferroelectric (AFE) transition in Hf1-xZrxO2 (HZO) is for the first time shown in a metal-ferroelectric-semiconductor (MFS) stack based on the III-V material InAs. As InAs displays excellent electron mobility and a narrow band gap, the integration of ferroelectric thin films for nonvolatile operations is highly relevant for future electronic devices and motivates further research on ferroelectric integration. When increasing the Zr fraction x from 0.5 to 1, the stack permittivity increases as expected, and the transition from FE to AFE-like behavior is observed by polarization and current-voltage characteristics. At x = 0.8 the polarization of the InAs-based stacks shows a larger FE-contribution as a more open hysteresis compared to both literature and reference metal-ferroelectric-metal (MFM) devices. By field-cycling the devices, the switching domains are studied as a function of the cycle number, showing that the difference in FE-AFE contributions for MFM and MFS devices is stable over switching and not an effect of wake-up. The FE contribution of the switching can be accessed by successively lowering the bias voltage in a proposed pulse train. The possibility of enhanced nonvolatility in Zr-rich HZO is relevant for device stacks that would benefit from an increase in permittivity and a lower operating voltage. Additionally, an interfacial layer (IL) is introduced between the HZO film and the InAs substrate. The interfacial quality is investigated as frequency-dependent capacitive dispersion, showing little change for varying ZrO2 concentrations and with or without included IL. This suggests material processing that is independently limiting the interfacial quality. Improved endurance of the InAs-Hf1-xZrxO2 devices with x = 0.8 was also observed compared to x = 0.5, with further improvement with the additional IL for Zr-rich HZO on InAs.
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| 7. |
- Persson, Anton E. O., et al.
(author)
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A method for estimating defects in ferroelectric thin film MOSCAPs
- 2020
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In: Applied Physics Letters. - : AIP Publishing. - 0003-6951 .- 1077-3118. ; 117:24
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Journal article (peer-reviewed)abstract
- We propose a capacitance measurement scheme that enables quantitative characterization of ferroelectric thin films integrated onsemiconductors. The film defect density is estimated by measurements of the CV hysteresis and frequency dispersion, whereas importantdevice parameters such as memory window and endurance can be extracted by a unidirectional CV method. The simple measurementscheme and the usage of metal-oxide-semiconductor capacitors rather than MOSFETs make the proposed methods suitable for the futureoptimization of ferroelectric field effect transistor and negative capacitance field effect transistor gate stacks. Specifically, we present data forthe narrow bandgap semiconductor InAs and show that low temperature characterization is critical to reduce the influence of the minoritycarrier response; however, the methods should be transferrable to room temperature for semiconductors with a wider bandgap. Our resultsclearly indicate that the defect density of the HfxZr1xO2 (HZO) films increases at the crystallization temperature, but the increase is modestand remains independent of the annealing temperature at even more elevated temperatures. It is also shown that the shrinkage of thememory window caused by field cycling is not accompanied by an increase in defect density.
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| 8. |
- Persson, Anton E. O.
(author)
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Integration of Ferroelectric HfO2 onto a III-V Nanowire Platform
- 2023
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Doctoral thesis (other academic/artistic)abstract
- The discovery of ferroelectricity in CMOS-compatible oxides, such as doped hafnium oxide, has opened new possibilities for electronics by reviving the use of ferroelectric implementations on modern technology platforms. This thesis presents the ground-up integration of ferroelectric HfO2 on a thermally sensitive III-V nanowire platform leading to the successful implementation of ferroelectric transistors (FeFETs), tunnel junctions (FTJs), and varactors for mm-wave applications. As ferroelectric HfO2 on III-V semiconductors is a nascent technology, a special emphasis is put on the fundamental integration issues and the various engineering challenges facing the technology.The fabrication of metal-oxide-semiconductor (MOS) capacitors is treated as well as the measurement methods developed to investigate the interfacial quality to the narrow bandgap III-V materials using both electrical and operando synchrotron light source techniques. After optimizing both the films and the top electrode, the gate stack is integrated onto vertical InAs nanowires on Si in order to successfully implement FeFETs. Their performance and reliability can be explained from the deeper physical understanding obtained from the capacitor structures.By introducing an InAs/(In)GaAsSb/GaSb heterostructure in the nanowire, a ferroelectric tunnel field effect transistor (ferro-TFET) is fabricated. Based on the ultra-short effective channel created by the band-to-band tunneling process, the localized potential variations induced by single ultra-scaled ferroelectric domains and individual defects are sensed and investigated. By intentionally introducing a gate-source overlap in the ferro-TFET, a non-volatile reconfigurable single-transistor solution for modulating an input signal with diverse modes including signal transmission, phase shift, frequency doubling, and mixing is implemented.Finally, by fabricating scaled ferroelectric MOS capacitors in the front-end with a dedicated and adopted RF and mm-wave backend-of-line (BEOL) implementation, the ferroelectric behavior is captured at RF and mm-wave frequencies.
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| 9. |
- Persson, Anton E. O., et al.
(author)
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Integration of Ferroelectric HfxZr1-xO2 on Vertical III-V Nanowire Gate-All-Around FETs on Silicon
- 2022
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In: IEEE Electron Device Letters. - 0741-3106. ; 43:6, s. 854-857
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Journal article (peer-reviewed)abstract
- We demonstrate a successful process scheme for the integration of a CMOS-compatible ferroelectric gate stack on a scaled vertical InAs nanowire gate-all-around MOSFET on silicon. The devices show promising device characteristics with nanosecond write time and large memory window of >1.5 V. In the current implementation, the device performance is mainly limited by access resistance, which is attributed to the thermal sensitivity of InAs. The findings indicate that the ferroelectricity is not intrinsically preventing future improvements of scaled III-V FeFETs.
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| 10. |
- Zhu, Zhongyunshen, et al.
(author)
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Reconfigurable signal modulation in a ferroelectric tunnel field-effect transistor
- 2023
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In: Nature Communications. - 2041-1723. ; 14
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Journal article (peer-reviewed)abstract
- Reconfigurable transistors are an emerging device technology adding new functionalities while lowering the circuit architecture complexity. However, most investigations focus on digital applications. Here, we demonstrate a single vertical nanowire ferroelectric tunnel field-effect transistor (ferro-TFET) that can modulate an input signal with diverse modes including signal transmission, phase shift, frequency doubling, and mixing with significant suppression of undesired harmonics for reconfigurable analogue applications. We realize this by a heterostructure design in which a gate/source overlapped channel enables nearly perfect parabolic transfer characteristics with robust negative transconductance. By using a ferroelectric gate oxide, our ferro-TFET is non-volatilely reconfigurable, enabling various modes of signal modulation. The ferro-TFET shows merits of reconfigurability, reduced footprint, and low supply voltage for signal modulation. This work provides the possibility for monolithic integration of both steep-slope TFETs and reconfigurable ferro-TFETs towards high-density, energy-efficient, and multifunctional digital/analogue hybrid circuits.
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| 11. |
- Zhu, Zhongyunshen, et al.
(author)
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Sensing single domains and individual defects in scaled ferroelectrics
- 2023
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In: Science Advances. - : American Association for the Advancement of Science (AAAS). - 2375-2548. ; 9:5
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Journal article (peer-reviewed)abstract
- Ultra-scaled ferroelectrics are desirable for high-density nonvolatile memories and neuromorphic computing; however, for advanced applications, single domain dynamics and defect behavior need to be understood at scaled geometries. Here, we demonstrate the integration of a ferroelectric gate stack on a heterostructure tunnel field-effect transistor (TFET) with subthermionic operation. On the basis of the ultrashort effective channel created by the band-to-band tunneling process, the localized potential variations induced by single domains and individual defects are sensed without physical gate-length scaling required for conventional transistors. We electrically measure abrupt threshold voltage shifts and quantify the appearance of new individual defects activated by the ferroelectric switching. Our results show that ferroelectric films can be integrated on heterostructure devices and indicate that the intrinsic electrostatic control within ferroelectric TFETs provides the opportunity for ultrasensitive scale-free detection of single domains and defects in ultra-scaled ferroelectrics. Our approach opens a previously unidentified path for investigating the ultimate scaling limits of ferroelectronics.
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