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Träfflista för sökning "WFRF:(Zirath Herbert 1955) "

Search: WFRF:(Zirath Herbert 1955)

  • Result 1-25 of 426
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1.
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3.
  • de Graauw, Th., et al. (author)
  • The Herschel-Heterodyne Instrument for the Far-Infrared (HIFI)
  • 2010
  • In: Astronomy and Astrophysics. - : EDP Sciences. - 0004-6361 .- 1432-0746. ; 518, s. L6-
  • Journal article (peer-reviewed)abstract
    • Aims: This paper describes the Heterodyne Instrument for the Far-Infrared (HIFI) that was launched onboard ESA's Herschel Space Observatory in May 2009. Methods: The instrument is a set of 7 heterodyne receivers that are electronically tuneable, covering 480-1250 GHz with SIS mixers and the 1410-1910 GHz range with hot electron bolometer (HEB) mixers. The local oscillator (LO) subsystem comprises a Ka-band synthesizer followed by 14 chains of frequency multipliers and 2 chains for each frequency band. A pair of auto-correlators and a pair of acousto-optical spectrometers process the two IF signals from the dual-polarization, single-pixel front-ends to provide instantaneous frequency coverage of 2 × 4 GHz, with a set of resolutions (125 kHz to 1 MHz) that are better than 0.1 km s-1. Results: After a successful qualification and a pre-launch TB/TV test program, the flight instrument is now in-orbit and completed successfully the commissioning and performance verification phase. The in-orbit performance of the receivers matches the pre-launch sensitivities. We also report on the in-orbit performance of the receivers and some first results of HIFI's operations. Herschel is an ESA space observatory with science instruments provided by European-led Principal Investigator consortia and with important participation from NASA.
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4.
  • Hassona, Ahmed Adel, 1988, et al. (author)
  • A Low-loss D-band Chip-to-Waveguide Transition Using Unilateral Fin-line Structure
  • 2018
  • In: IEEE MTT-S International Microwave Symposium Digest. - 0149-645X. ; 2018-June, s. 390-393
  • Conference paper (peer-reviewed)abstract
    • This paper presents a D-band interconnect realized using unilateral finline structure. The interconnect consists of a microstrip line implemented on a 75μm-thick SiC substrate. The line then couples to a unilateral finline taper that is mounted in the E-plane of a standard WR-6.5 D-band waveguide. The interconnect achieves low insertion loss and covers very wide frequency range. The measured minimum insertion loss is 0.67 dB and the maximum is 2 dB per transition across the entire D-band covering the frequency range 110-170 GHz. The transition does not require any galvanic contacts nor any special processing and can be implemented in any of the commercially available semiconductor technologies. This solution provides low-loss wideband packaging technique that enables millimeter-wave systems assembly using a high-performance simple approach.
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5.
  • Hassona, Ahmed Adel, 1988, et al. (author)
  • Compact Low-Loss Chip-to-Waveguide and Chip-to-Chip Packaging Concept Using EBG Structures
  • 2021
  • In: IEEE Microwave and Wireless Components Letters. - 1558-1764 .- 1531-1309. ; 31:1, s. 9-12
  • Journal article (peer-reviewed)abstract
    • This letter presents a novel approach for packaging millimeter-wave (mmW) and terahertz (THz) circuits. The proposed technique relies on using an on-chip coupling structure that couples the signal to a quarter-wavelength cavity, which in turn couples to either a waveguide (WG) or another chip. The solution also uses a periodic electromagnetic bandgap (EBG) structure that controls the electromagnetic wave and prevents field leakage in undesired directions. The proposed solution is fabricated and demonstrated at the D-band (110-170 GHz), and the measurement results show that it achieves a minimum insertion loss of 0.8 and a 3-dB bandwidth extending from 124 to 161 GHz. The proposed approach does not require any galvanic contacts and can be used for packaging integrated circuits in WG modules as well as for chip-to-chip communication.
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7.
  • Abbasi, Morteza, 1982, et al. (author)
  • A 80-95 GHz direct quadrature modulator in SiGe technology
  • 2014
  • In: SiRF 2014 - 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems. - 9781479915231 ; , s. 56-58
  • Conference paper (peer-reviewed)abstract
    • A direct carrier IQ modulator operating in the 80-95 GHz frequency range is presented. The circuit is designed and fabricated in 0.18μm SiGe technology with 170/250 GHz fT/fmax. The modulator is based on double-balanced gilbert mixer cells with on-chip quadrature LO phase shifter and consumes 23mW DC power. In single-sideband operation, the chip exhibits up to 3 dB conversion gain below 85 GHz and -1± 0.5 dB up to 95 GHz. The image rejection ratio and LO-RF isolation are as high as 25 dB and 43 dB respectively. The modulator can operate with 10 GHz of modulation bandwidth and delivers -7 dBm power in saturation. For demonstration, the circuit is tested and shown to be capable of transmitting 4Gbps BPSK signal with NRZ rectangular pulses. The active chip area is 480μm× 260μm. © 2014 IEEE.
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8.
  • Abbasi, Morteza, 1982, et al. (author)
  • A Broadband 60-to-120 GHz single-chip MMIC multiplier chain
  • 2009
  • In: IEEE MTT-S International Microwave Symposium Digest. - 0149-645X. ; , s. 441-444
  • Conference paper (peer-reviewed)abstract
    • This paper presents a single-chip 60 GHz to 120 GHz frequency multiplier chain based on 0.1 ?m GaAs mHEMT. The MMIC can deliver 3 to 5 dBm of output power from 110 GHz to 130 GHz with 2 dBm input power and consumes only 65 mW of DC power. The signal at the fundamental frequency is suppressed more than 20 dB over the band of interest. The impedance matching networks are realized using coupled transmission lines.
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9.
  • Abbasi, Morteza, 1982, et al. (author)
  • A broadband differential cascode power amplifier in 45 nm CMOS for high-speed 60 GHz system-on-chip
  • 2010
  • In: 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010; Anaheim, CA; 23 May 2010 through 25 May 2010. - 1529-2517. ; , s. 978-142446242-1-
  • Conference paper (peer-reviewed)abstract
    • A compact two-stage differential cascode power amplifier is designed and fabricated in 45 nm standard LP CMOS. The cascode configuration, with the common gate device placed in a separate P-well, provides reliable operating condition for the devices. The amplifier shows 20 dB small-signal gain centered at 60 GHz with a flat frequency response and 1-dB bandwidth of 10 GHz. The broadband large-signal operation is also ensured by providing constant load resistance to both stages over the entire band and coupling them with a dual resonance matching network. The chip delivers 11.2 dBm output power at 1-dB compression and up to 14.5 dBm power in saturation. The power amplifier operates with 2 V supply and draws 90 mA total current which results in 14.4% maximum PAE. The output third order intercept point is measured to be 18 dBm for two-tone measurement at 60 GHz with 0.5 GHz, 1 GHz and 2 GHz frequency separations. © 2010 IEEE.
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10.
  • Abbasi, Morteza, 1982, et al. (author)
  • A direct conversion quadrature transmitter with digital interface in 45 nm CMOS for high-speed 60 GHz communications
  • 2011
  • In: Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium. Baltimore, 5-7 June 2011. - 1529-2517. - 9781424482931
  • Conference paper (peer-reviewed)abstract
    • A compact 60 GHz direct conversion quadrature transmitter is designed and fabricated in 45 nm standard LP CMOS. The transmitter features an integrated power amplifier with continuous output level control and interfaces binary data signals with nominal peak-to-peak voltage swing of 300 mV. The highest measured modulation bandwidth is limited by the measurement setup to 4 GHz but is simulated to be as high as 10 GHz. In single sideband up-converting operation mode, the measured image suppression ratio is 22 dB with 36 dB of carrier suppression corresponding to approximately 8% EVM in the output signal constellation. The output RF frequency can be from 54 GHz to 66 GHz to accommodate several channels and the output power can be adjusted from -3 dBm to 10 dBm. The chip is operated from a 2 V supply and draws 180 mA current.
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11.
  • Abbasi, Morteza, 1982, et al. (author)
  • An E-Band(71-76, 81-86 GHz) Balanced Frequency Tripler for High-Speed Communications
  • 2009
  • In: APMC: 2009 ASIA PACIFIC MICROWAVE CONFERENCE. - 9781424428014 ; 1-5, s. 1184-1187
  • Conference paper (other academic/artistic)abstract
    • An E-Band transistor-based balanced frequency tripler is implemented using a 0.15 mu m GaAs mHEMT process which can be integrated into a single-chip RF front-end. The balanced configuration with 90 degrees hybrids at the input and output improves the port impedance matching which is measured to be better than 15 dB at the input and 10 dB at the output over the frequencies of interest. The tripler has a conversion loss of 11.5 dB from 71 GHz to 76 GHz and 14 dB from 81 GHz to 86 GHz. The second and forth harmonics are suppressed by more than 30 dB and the fundamental frequency by 20 dB. The tripler can deliver -2 dBm output power.
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12.
  • Abbasi, Morteza, 1982, et al. (author)
  • Direct carrier quadrature modulator and Demodulator MMICs for 60 GHz gigabit wireless communications
  • 2011
  • In: Asia-Pacific Microwave Conference Proceedings (APMC 2011; Melbourne, VIC; 5 - 8 December 2011). - 9780858259744 ; , s. 1134-1137
  • Conference paper (other academic/artistic)abstract
    • A 60 GHz direct carrier quadrature modulator is designed and fabricated in 0.15 μm mHEMT technology. The design is based on passive mixers and therefore reciprocal which makes it possible to be used both as modulator and demodulator. The modulator has an input bandwidth of 0-5 GHz on each of the I and Q ports and an RF bandwidth of 53-68 GHz. Carrier leakage to the output port is eliminated by addition of an inductive path from the LO port to the RF port. The modulator requires 5 dBm LO power and can output up to -6 dBm RF power in linear region and up to -4 dBm when driven into saturation. When operated as an SSB mixer, the conversion loss is measured to be 11 dB and image and LO signals are suppressed by as much as 30 dB compared to the desired signal. For demonstration, a pair of the presented modulator/demodulator is used to transmit 7Gbps BPSK signal over 1m and 10Gbps QPSK signal over 0.5m wireless link.
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13.
  • Abbasi, Morteza, 1982, et al. (author)
  • Single-Chip 220-GHz Active Heterodyne Receiver and Transmitter MMICs With On-Chip Integrated Antenna
  • 2011
  • In: IEEE Transactions on Microwave Theory and Techniques. - 0018-9480 .- 1557-9670. ; 59:2, s. 466-478
  • Journal article (peer-reviewed)abstract
    • This paper presents the design and characterization of single-chip 220-GHz heterodyne receiver (RX) and transmitter (TX) monolithic microwave integrated circuits (MMICs) with integrated antennas fabricated in 0.1-mu m GaAs metamorphic high electron-mobility transistor technology. The MMIC receiver consists of a modified square-slot antenna, a three-stage low-noise amplifier, and a sub-harmonically pumped resistive mixer with on-chip local oscillator frequency multiplication chain. The transmitter chip is the dual of the receiver chip by inverting the direction of the RF amplifier. The chips are mounted on 5-mm silicon lenses in order to interface the antenna to the free space and are packaged into two separate modules. The double-sideband noise figure (NF) and conversion gain of the receiver module are measured with the Y-factor method. The total noise temperature of 1310 +/- 100K(corresponding to an NF of 7.4 dB), including the losses in the lens and antenna, is measured at 220 GHz with a respective conversion gain of 3.5 dB. The radiated continuous-wave power from the transmitter module is measured to be up to -6 dBm from 212 to 226 GHz. The transmitter and receiver are linked in a quasi-optical setup and the IF to IF response is measured to be flat up to 10 GHz. This is verified to be usable for transmission of a 12.5-Gb/s data stream between the transmit and receive modules over a 0.5-m wireless link. The modules operate with a 1.3-V supply and each consume 110-mW dc power. The presented 220-GHz integrated circuits and modules can be used in a variety of applications, including passive and active imaging, as well as high-speed data communications. To the best of our knowledge, these MMICs are the highest frequency single-chip low-noise heterodyne receiver and transmitter pair reported to date.
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14.
  • Abbasi, Morteza, 1982, et al. (author)
  • Single-Chip Frequency Multiplier Chains for Millimeter-Wave Signal Generation
  • 2009
  • In: IEEE Transactions on Microwave Theory and Techniques. - 0018-9480 .- 1557-9670. ; 57:12, s. 3134-3142
  • Journal article (peer-reviewed)abstract
    • Two single-chip frequency multiplier chains targeting 118 and 183 GHz output frequencies are presented. The chips are fabricated in a 0.1 mu m GaAs metamorphic high electron-mobility transistor process. The D-band frequency doubler chain covers 110 to 130 GHz with peak output power of 5 dBm. The chip requires 2 dBm input power and consumes only 65 mW of dc power. The signal at the fundamental frequency is suppressed more than 25 dB compared to the desired output signal over the band of interest. The G-band frequency sextupler (x6) chain covers 155 to 195 GHz with 0 dBm peak output power and requires 6.5 dBm input power and 92.5 mW dc power. The input signal to the multiplier chain can be reduced to 4 dBm while the output power drops only by 0.5 dB. The unwanted harmonics are suppressed more than 30 dB compared to the desired signal. An additional 183 GHz power amplifier is presented to be used after the x6 frequency multiplier chain if higher output power is required. The amplifier delivers 5 dBm output power with a small-signal gain of 9 dB from 155 to 195 GHz. The impedance matching networks are realized using coupled transmission lines which is shown to be a scalable and straightforward structure to use in amplifier design. Microstrip transmission lines are used in all the designs.
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15.
  • An, Sining, 1991, et al. (author)
  • A 40 Gbps DQPSK Modem for Millimeter-wave Communications
  • 2016
  • In: Asia-Pacific Microwave Conference Proceedings APMC 2015. ; 1
  • Conference paper (peer-reviewed)abstract
    • A high speed differential quadrature phase shift keying (DQPSK) modulator and demodulator (modem) is presented for data rates up to 40 Gbps, in which the modulator is based on an FPGA and the demodulator is based on analog components. The modem performance has been verified in a lab environment. The targeted application is wireless communications using millimeter-wave bands as a flexible alternative to optical fiber links in next generation mobile networks.
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16.
  • An, Sining, 1991, et al. (author)
  • A D-band Dual-Mode Dynamic Frequency Divider in 130nm SiGe Technology
  • 2020
  • In: IEEE Microwave and Wireless Components Letters. - 1558-1764 .- 1531-1309. ; 30:12, s. 1169-1172
  • Journal article (peer-reviewed)abstract
    • In this work, a dual-mode (divide-by-2 and divide-by-3) dynamic frequency divider is presented.  A tunable delay gated ring oscillator (TDGRO) topology is proposed for dual-mode operation and bandwidth extension. It uses a 130 nm gate length SiGe BiCMOS technology with ft and fmax of 250 GHz and 370 GHz, respectively. Verification shows that it works at W-band from 70 GHz to 114 GHz (47.8% bandwidth) for divide-by-2 and works at D-band from 105 GHz to 160 GHz (41.5% bandwidth) for divide-by-3. This divider can be used in integrated phase lock loops (PLLs) at millimeter-wave frequencies.
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17.
  • An, Sining, 1991, et al. (author)
  • A Synchronous Baseband Receiver for High-Data-Rate Millimeter-Wave Communication Systems
  • 2019
  • In: IEEE Microwave and Wireless Components Letters. - 1558-1764 .- 1531-1309. ; 29:6, s. 412-414
  • Journal article (peer-reviewed)abstract
    • A novel synchronous baseband receiver is presented in this letter. With a pilot tone insertion at the transmitter, the proposed baseband receiver can perform carrier recovery (CR) regardless of modulation scheme and/or baud rate. The synchronous baseband receiver has an analog-digital hybrid structure, where a low-cost digital signal processor controls an analog local oscillator (LO) in frequency and phase to achieve CR. This structure requires only one low-cost analog-to-digital converter (ADC) with a sampling rate of 100 MS/s. A proof-of-concept demonstration at E-band achieves 9-Gb/s 64-quadratic-amplitude modulation (QAM) and 16-Gb/s QPSK transmissions.
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18.
  • An, Sining, 1991, et al. (author)
  • An 8 Gbps E-band QAM Transmitter Using Symbol-based Outphasing Power Combining Technique
  • 2017
  • In: Radio-Frequency Integration Technology (RFIT2017). - 9781509040360 ; , s. 150-152
  • Conference paper (peer-reviewed)abstract
    • In millimeter-wave communication systems, generating high output power with high efficiency on the transmitter side is one major challenge. In this paper, a symbol-based outphasing power combining solution has been demonstrated with data rate up to 8 Gbps at an RF frequency of 83.5 GHz. This solution provides 2 dB higher output power compared to the power of two QAM signals at 12% EVM.
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19.
  • An, Sining, 1991, et al. (author)
  • Coded Pilot Assisted Baseband Receiver for High Data Rate Millimeter-Wave Communications
  • 2020
  • In: IEEE Transactions on Microwave Theory and Techniques. - 0018-9480 .- 1557-9670. ; 68:11, s. 4719-4727
  • Journal article (peer-reviewed)abstract
    • A coded pilot assisted high data rate millimeter-wave receiver topology is presented in this article. A low data rate and low power pseudorandom noise (pn) coded pilot signal is superimposed at the transmitter, and the receiver can use such pilot for carrier recovery (CR) and/or channel estimation regardless of modulation scheme or communication data rate. The proposed baseband receiver has an analog-digital hybrid structure where a low-cost digital signal processor is used. This structure requires only a low-cost analog-to-digital converter (ADC) with a sampling rate of 40 MSPS. A proof-of-concept communication link at E-band is demonstrated with 18 Gbps 64-quadrature amplitude modulation (QAM) and 24 Gbps 16-QAM.
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20.
  • An, Sining, 1991, et al. (author)
  • Micrometer Accuracy Phase Modulated Radar for Distance Measurement and Monitoring
  • 2020
  • In: IEEE Sensors Journal. - 1558-1748 .- 1530-437X. ; 20:6, s. 2919-2927
  • Journal article (peer-reviewed)abstract
    • An enhanced accuracy random binary phase modulated radar is proposed. It can be used in high accuracy monitoring in manufacturing. Compared with the traditional high accuracy radar using frequency modulated continuous wave (FMCW), the proposed radar system can be used in a multi-user scenario without occupying more bandwidth. A two-step distance estimation method is introduced to estimate the distance. First, the distance estimation accuracy is narrowed down to a half carrier wavelength by analyzing the envelope of the phase modulated signal. Then the carrier phase information increases the distance accuracy to several micrometers. An equalization method is introduced to solve the I/Q imbalance problem. The proposed radar system is demonstrated at a carrier frequency of 80 GHz with a bandwidth of 2 GHz. The measured distance error was within ±7 μm. In addition, a high measurement repetition rate of 500 kHz was reached which is suitable for real-time monitoring in automatic manufacturing.
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21.
  • An, Sining, 1991, et al. (author)
  • Millimeter-Wave Multi-Channel Backscatter Communication and Ranging with an FMCW Radar
  • 2022
  • In: Sensors. - : MDPI AG. - 1424-8220. ; 22:19
  • Journal article (peer-reviewed)abstract
    • A multi-channel backscatter communication and radar sensing system is proposed and demonstrated in this paper. Frequency modulated continuous wave (FMCW) radar ranging is integrated with simultaneous uplink data transmission from a self-packaged active radio frequency (RF) tag. A novel package solution is proposed for the RF tag. With the proposed package, the RF tag can transmit a 32-QAM signal up to 2.5 Gbps and QPSK signal up to 8 Gbps. For a multi-tag scenario, we proposed using spread spectrum code to separate the data from each tag. In this case, tags can be placed at arbitrary locations without adjacent channel interference. Proof-of-concept simulations and measurements are demonstrated. A 625 Mbps data rate is achieved in a dual-tag scenario for two tags.
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22.
  • Andersson, Christer, 1982, et al. (author)
  • A SiC Varactor With Large Effective Tuning Range for Microwave Power Applications
  • 2011
  • In: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 32:6, s. 788-790
  • Journal article (peer-reviewed)abstract
    • SiC Schottky diode varactors have been fabricated for use in microwave power applications, specifically the dynamic load modulation of power amplifiers. A custom doping profile has been employed to spread the C(V) over a large bias voltage range, thereby increasing the effective tuning range under large voltage swing conditions. The small-signal tuning range is approximately six, and punch through is reached at a bias voltage of -60 V, while the breakdown voltage is on the order of -160 V. An interdigitated layout is utilized together with a self-aligned Schottky anode etch process to improve the Q-factor at 2 GHz, which is 20 at zero bias and approximately 160 at punch through.
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23.
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24.
  • Andersson, Kristoffer, 1976, et al. (author)
  • Fabrication and characterization of field-plated buried-gate SiC MESFETs
  • 2006
  • In: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:7, s. 573-575
  • Journal article (peer-reviewed)abstract
    • Silicon carbide (SiC) MESFETs were fabricated using a standard SiC MESFET structure with the application of the "buried-channel" and field-plate (FP) techniques in the process. FPs combined with a buried-gate are shown to be favorable concerning output power density and power-added efficiency (PAE), due to higher breakdown voltage and decreased output conductance. A very high power density of 7.8 W/mm was measured on-wafer at 3 GHz for a two-finger 400-/spl mu/m gate periphery SiC MESFET. The PAE for this device was 70% at class AB bias. Two-tone measurements at 3 GHz /spl plusmn/ 100 kHz indicate an optimum FP length for high linearity operation.
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25.
  • Andersson, Kristoffer, 1976, et al. (author)
  • Resistive SiC-MESFET mixer
  • 2002
  • In: IEEE Microwave and Wireless Components Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 1531-1309 .- 1558-1764. ; 12:4, s. 119-121
  • Journal article (peer-reviewed)abstract
    • A single-ended silicon carbide resisitve MESFET mixer with minimum conversion loss (CL) of 10.2 dB and an input third order intercept point of 35.7 dB at 3.3 GHz was designed and characterized. A lumped-element, large-signal model was used for modeling the device. The drain-source resistance was measured by taking the real part of the output port impedence. Analysis suggested that the optimum gate bias for minimum CL was -6.7 V.
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