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1.
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2.
  • Abelev, Betty, et al. (author)
  • Long-range angular correlations on the near and away side in p-Pb collisions at root S-NN=5.02 TeV
  • 2013
  • In: Physics Letters. Section B: Nuclear, Elementary Particle and High-Energy Physics. - : Elsevier BV. - 0370-2693. ; 719:1-3, s. 29-41
  • Journal article (peer-reviewed)abstract
    • Angular correlations between charged trigger and associated particles are measured by the ALICE detector in p-Pb collisions at a nucleon-nucleon centre-of-mass energy of 5.02 TeV for transverse momentum ranges within 0.5 < P-T,P-assoc < P-T,P-trig < 4 GeV/c. The correlations are measured over two units of pseudorapidity and full azimuthal angle in different intervals of event multiplicity, and expressed as associated yield per trigger particle. Two long-range ridge-like structures, one on the near side and one on the away side, are observed when the per-trigger yield obtained in low-multiplicity events is subtracted from the one in high-multiplicity events. The excess on the near-side is qualitatively similar to that recently reported by the CMS Collaboration, while the excess on the away-side is reported for the first time. The two-ridge structure projected onto azimuthal angle is quantified with the second and third Fourier coefficients as well as by near-side and away-side yields and widths. The yields on the near side and on the away side are equal within the uncertainties for all studied event multiplicity and p(T) bins, and the widths show no significant evolution with event multiplicity or p(T). These findings suggest that the near-side ridge is accompanied by an essentially identical away-side ridge. (c) 2013 CERN. Published by Elsevier B.V. All rights reserved.
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3.
  • Abelev, Betty, et al. (author)
  • Measurement of prompt J/psi and beauty hadron production cross sections at mid-rapidity in pp collisions at root s=7 TeV
  • 2012
  • In: Journal of High Energy Physics. - 1029-8479. ; :11
  • Journal article (peer-reviewed)abstract
    • The ALICE experiment at the LHC has studied J/psi production at mid-rapidity in pp collisions at root s = 7 TeV through its electron pair decay on a data sample corresponding to an integrated luminosity L-int = 5.6 nb(-1). The fraction of J/psi from the decay of long-lived beauty hadrons was determined for J/psi candidates with transverse momentum p(t) > 1,3 GeV/c and rapidity vertical bar y vertical bar < 0.9. The cross section for prompt J/psi mesons, i.e. directly produced J/psi and prompt decays of heavier charmonium states such as the psi(2S) and chi(c) resonances, is sigma(prompt J/psi) (p(t) > 1.3 GeV/c, vertical bar y vertical bar < 0.9) = 8.3 +/- 0.8(stat.) +/- 1.1 (syst.)(-1.4)(+1.5) (syst. pol.) mu b. The cross section for the production of b-hadrons decaying to J/psi with p(t) > 1.3 GeV/c and vertical bar y vertical bar < 0.9 is a sigma(J/psi <- hB) (p(t) > 1.3 GeV/c, vertical bar y vertical bar < 0.9) = 1.46 +/- 0.38 (stat.)(-0.32)(+0.26) (syst.) mu b. The results are compared to QCD model predictions. The shape of the p(t) and y distributions of b-quarks predicted by perturbative QCD model calculations are used to extrapolate the measured cross section to derive the b (b) over bar pair total cross section and d sigma/dy at mid-rapidity.
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4.
  • Abelev, Betty, et al. (author)
  • Underlying Event measurements in pp collisions at root s=0.9 and 7 TeV with the ALICE experiment at the LHC
  • 2012
  • In: Journal of High Energy Physics. - 1029-8479. ; :7
  • Journal article (peer-reviewed)abstract
    • We present measurements of Underlying Event observables in pp collisions at root s = 0 : 9 and 7 TeV. The analysis is performed as a function of the highest charged-particle transverse momentum p(T),L-T in the event. Different regions are defined with respect to the azimuthal direction of the leading (highest transverse momentum) track: Toward, Transverse and Away. The Toward and Away regions collect the fragmentation products of the hardest partonic interaction. The Transverse region is expected to be most sensitive to the Underlying Event activity. The study is performed with charged particles above three different p(T) thresholds: 0.15, 0.5 and 1.0 GeV/c. In the Transverse region we observe an increase in the multiplicity of a factor 2-3 between the lower and higher collision energies, depending on the track p(T) threshold considered. Data are compared to PYTHIA 6.4, PYTHIA 8.1 and PHOJET. On average, all models considered underestimate the multiplicity and summed p(T) in the Transverse region by about 10-30%.
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5.
  • Aghaee Ghaleshahi, Nima, et al. (author)
  • Temperature-Aware SoC Test Scheduling Considering Inter-Chip Process Variation
  • 2010
  • In: <em>19th IEEE Asian Test Symposium (ATS10), Shanghai, China, December 1-4, 2010.</em>. - 9781424488414
  • Conference paper (peer-reviewed)abstract
    • Systems on Chip implemented with deep submicron technologies suffer from two undesirable effects, high power density, thus high temperature, and high process variation, which must be addressed in the test process. This paper presents two temperature-aware scheduling approaches to maximize the test throughput in the presence of inter-chip process variation. The first approach, an off-line technique, improves the test throughput by extending the traditional scheduling method. The second approach, a hybrid one, improves further the test throughput with a chip classification scheme at test time based on the reading of a temperature sensor. Experimental results have demonstrated the efficiency of the proposed methods.
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6.
  • Amare, Azmeraw, et al. (author)
  • Association of Polygenic Score and the involvement of Cholinergic and Glutamatergic Pathways with Lithium Treatment Response in Patients with Bipolar Disorder.
  • 2023
  • In: Research square. - : Research Square Platform LLC.
  • Journal article (peer-reviewed)abstract
    • Lithium is regarded as the first-line treatment for bipolar disorder (BD), a severe and disabling mental disorder that affects about 1% of the population worldwide. Nevertheless, lithium is not consistently effective, with only 30% of patients showing a favorable response to treatment. To provide personalized treatment options for bipolar patients, it is essential to identify prediction biomarkers such as polygenic scores. In this study, we developed a polygenic score for lithium treatment response (Li+PGS) in patients with BD. To gain further insights into lithium's possible molecular mechanism of action, we performed a genome-wide gene-based analysis. Using polygenic score modeling, via methods incorporating Bayesian regression and continuous shrinkage priors, Li+PGS was developed in the International Consortium of Lithium Genetics cohort (ConLi+Gen: N=2,367) and replicated in the combined PsyCourse (N=89) and BipoLife (N=102) studies. The associations of Li+PGS and lithium treatment response - defined in a continuous ALDA scale and a categorical outcome (good response vs. poor response) were tested using regression models, each adjusted for the covariates: age, sex, and the first four genetic principal components. Statistical significance was determined at P<����������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������������.
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7.
  • Amare, Azmeraw T, et al. (author)
  • Association of polygenic score and the involvement of cholinergic and glutamatergic pathways with lithium treatment response in patients with bipolar disorder.
  • 2023
  • In: Molecular psychiatry. - 1476-5578. ; 28, s. 5251-5261
  • Journal article (peer-reviewed)abstract
    • Lithium is regarded as the first-line treatment for bipolar disorder (BD), a severe and disabling mental healthdisorder that affects about 1% of the population worldwide. Nevertheless, lithium is not consistently effective, with only 30% of patients showing a favorable response to treatment. To provide personalized treatment options for bipolar patients, it is essential to identify prediction biomarkers such as polygenic scores. In this study, we developed a polygenic score for lithium treatment response (Li+PGS) in patients with BD. To gain further insights into lithium's possible molecular mechanism of action, we performed a genome-wide gene-based analysis. Using polygenic score modeling, via methods incorporating Bayesian regression and continuous shrinkage priors, Li+PGS was developed in the International Consortium of Lithium Genetics cohort (ConLi+Gen: N=2367) and replicated in the combined PsyCourse (N=89) and BipoLife (N=102) studies. The associations of Li+PGS and lithium treatment response - defined in a continuous ALDA scale and a categorical outcome (good response vs. poor response) were tested using regression models, each adjusted for the covariates: age, sex, and the first four genetic principal components. Statistical significance was determined at P<0.05. Li+PGS was positively associated with lithium treatment response in the ConLi+Gen cohort, in both the categorical (P=9.8×10-12, R2=1.9%) and continuous (P=6.4×10-9, R2=2.6%) outcomes. Compared to bipolar patients in the 1st decile of the risk distribution, individuals in the 10th decile had 3.47-fold (95%CI: 2.22-5.47) higher odds of responding favorably to lithium. The results were replicated in the independent cohorts for the categorical treatment outcome (P=3.9×10-4, R2=0.9%), but not for the continuous outcome (P=0.13). Gene-based analyses revealed 36 candidate genes that are enriched in biological pathways controlled by glutamate and acetylcholine. Li+PGS may be useful in the development of pharmacogenomic testing strategies by enabling a classification of bipolar patients according to their response to treatment.
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8.
  • Andrei, Alexandru, et al. (author)
  • Energy optimization of multiprocessor systems on chip by voltage selection
  • 2007
  • In: IEEE Transactions on Very Large Scale Integration (vlsi) Systems. - 1063-8210 .- 1557-9999. ; 15:3, s. 262-275
  • Journal article (peer-reviewed)abstract
    • Dynamic voltage selection and adaptive body biasing have been shown to reduce dynamic and leakage power consumption effectively. In this paper, we optimally solve the combined supply voltage and body bias selection problem for multiprocessor systems with imposed time constraints, explicitly taking into account the transition overheads implied by changing voltage levels. Both energy and time overheads are considered. The voltage selection technique achieves energy efficiency by simultaneously scaling the supply and body bias voltages in the case of processors and buses with repeaters, while energy efficiency on fat wires is achieved through dynamic voltage swing scaling. We investigate the continuous voltage selection as well as its discrete counterpart, and we prove strong NP-hardness in the discrete case. Furthermore, the continuous voltage selection problem is solved using nonlinear programming with polynomial time complexity, while for the discrete problem, we use mixed integer linear programming and a polynomial time heuristic. We propose an approach that combines voltage selection and processor shutdown in order to optimize the total energy. © 2007 IEEE.
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9.
  • Andrei, Alexandru, 1977-, et al. (author)
  • Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems
  • 2004
  • In: Design, Automation and Test in Europe DATE 2004,2004. - Paris, France : IEEE Computer Society Press. - 0769520855 ; , s. 518-
  • Conference paper (peer-reviewed)abstract
    • Dynamic voltage scaling and adaptive body biasing have been shown to reduce dynamic and leakage power consumption effectively. In this paper, we optimally solve the combined supply voltage and body bias selection problem for multi-processor systems with imposed time constraints, explicitly taking into account the transition overheads implied by changing voltage levels. Both energy and time overheads are considered. We investigate the continuous voltage scaling as well as its discrete counterpart, and we prove NP-hardness in the discrete case. Furthermore, the continuous voltage scaling problem is formulated and solved using nonlinear programming with polynomial time complexity, while for the discrete problem we use mixed integer linear programming. Extensive experiments, conducted on several benchmarks and a real-life example, are used to validate the approaches.
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10.
  • Andrei, Alexandru, 1977-, et al. (author)
  • Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems
  • 2005
  • In: IEE Proceedings - Computers and digital Techniques. - : IEEE. - 1350-2387 .- 1359-7027. ; 152:01, s. 28-38
  • Journal article (peer-reviewed)abstract
    • Dynamic voltage scaling and adaptive body biasing have been shown to reduce dynamic and leakage power consumption effectively. In this paper, we optimally solve the combined supply voltage and body bias selection problem for multi-processor systems with imposed time constraints, explicitly taking into account the transition overheads implied by changing voltage levels. Both energy and time overheads are considered. We investigate the continuous voltage scaling as well as its discrete counterpart, and we prove NP-hardness in the discrete case. Furthermore, the continuous voltage scaling problemis formulated and solved using nonlinear programming with polynomial time complexity, while for the discrete problem we use mixed integer linear programming. Extensive experiments, conducted on several benchmarks and a real-life example, are used to validate the approaches.
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11.
  • Andrei, Alexandru, 1977-, et al. (author)
  • Predictable Implementation of Real-Time Applications on Multiprocessor Systems on Chip
  • 2008
  • In: VLSI Design, 2008. VLSID 2008. - : IEEE Computer Society. - 0769530834 - 9780769530833 ; , s. 103-110
  • Conference paper (peer-reviewed)abstract
    • Worst-case execution time (WCET) analysis and, in general, the predictability of real-time applications implemented on multiprocessor systems has been addressed only in very restrictive and particular contexts. One important aspect that makes the analysis difficult is the estimation of the system-s communication behavior. The traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers as result of cache misses. As opposed to the analysis performed for a single processor system, where the cache miss penalty is constant, in a multiprocessor system each cache miss has a variable penalty, depending on the bus contention. This affects the tasks- WCET which, however, is needed in order to perform system scheduling. At the same time, the WCET depends on the system schedule due to the bus interference. In this context, we propose, for the first time, an approach to worst-case execution time analysis and system scheduling for real-time applications implemented on multiprocessor SoC architectures.
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12.
  • Andrei, Alexandru, et al. (author)
  • Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints
  • 2011
  • In: IEEE Transactions on Very Large Scale Integration (vlsi) Systems. - : IEEE. - 1063-8210 .- 1557-9999. ; 19:1, s. 10-23
  • Journal article (peer-reviewed)abstract
    • Supply voltage scaling and adaptive body-biasing are important techniques that help to reduce the energy dissipation of embedded systems. This is achieved by dynamically adjusting the voltage and performance settings according to the application needs. In order to take full advantage of slack that arises from variations in the execution time, it is important to recalculate the voltage (performance) settings during runtime, i.e., online. However, optimal voltage scaling algorithms are computationally expensive, and thus, if used online, significantly hamper the possible energy savings. To overcome the online complexity, we propose a quasi-static voltage scaling scheme, with a constant online time complexity O(1). This allows to increase the exploitable slack as well as to avoid the energy dissipated due to online recalculation of the voltage settings.
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13.
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14.
  • Andrei, Alexandru, 1977-, et al. (author)
  • Simultaneous Communication and Processor Voltage Scaling for Dynamic and Leakage Energy Reduction in Time-Constrained Systems
  • 2004
  • In: International Conference on Computer Aided Design ICCAD 2004,2004. - San Jose, USA : IEEE Computer Society Press. - 0780387023 ; , s. 362-
  • Conference paper (peer-reviewed)abstract
    • In this paper, we propose a new technique for the combined voltage scaling of processors and communication links, taking into account dynamic as well as leakage power consumption. The voltage scaling technique achieves energy efficiency by simultaneously scaling the supply and body bias voltages in the case of processors and buses with repeaters, while energy efficiency on fat wires is achieved through dynamic voltage swing scaling. We also introduce a set of accurate communication models for the energy estimation of voltage scalable embedded systems. In particular, we demonstrate that voltage scaling of bus repeaters and dynamic adaption of the voltage swing on fat wires can significantly influence the system's energy consumption. Experimental results, conducted on numerous generated benchmarks and a real-life example, demonstrate that substantial energy savings can be achieved with the proposed techniques.
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15.
  • Andrei, Alexandru, 1977-, et al. (author)
  • Voltage Selection for Time-Constrained Multiprocessor Systems on Chip
  • 2007
  • In: Designing Embedded Processors: A Low Power Perspective. - Dordrecht : Springer. - 9781402058684 - 1402058683 ; , s. 259-286
  • Book chapter (other academic/artistic)abstract
    • As we embrace the world of personal, portable, and perplexingly complex digital systems, it has befallen upon the bewildered designer to take advantage of the available transistors to produce a system which is small, fast, cheap and correct, yet possesses increased functionality. Increasingly, these systems have to consume little energy.Designers are increasingly turning towards small processors, which are low power, and customize these processors both in software and hardware to achieve their objectives of a low power system, which is verified, and has short design turnaround times. Designing Embedded Processors examines the many ways in which processor based systems are designed to allow low power devices.It looks at processor design methods, memory optimization, dynamic voltage scaling methods, compiler methods, and multi processor methods. Each section has an introductory chapter to give a breadth view, and have a few specialist chapters in the area to give a deeper perspective. The book provides a good starting point to engineers in the area, and to research students embarking upon the exciting area of embedded systems and architectures.
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16.
  • Atxa, Ariane, et al. (author)
  • Liminal Spaces and Human-Centred Design (HCD) for Resilient Business Models
  • 2024
  • In: Sustainable business models for the digital, green and inclusive transition. ; , s. 107-107
  • Conference paper (peer-reviewed)abstract
    • In today’s intricate business landscape, characterised by volatility and uncertainty, organisations encounter numerous external challenges. In this context, the concept of liminality offers a unique perspective on organisational transition, fostering environments conducive to reflection and exploration. Liminal spaces, which often correspond to strategy workshops, provide environments for experimentation and innovation, facilitating the co-creation of solutions. While theoretical exploration of liminality is extensive, practical insights on facilitating liminal workshops are lacking. Human-Centred Design (HCD) has proven effective in facilitating organisational change through co-creation practices. Therefore, in this study we propose the hybridisation of HCD co-creation practices and liminal spaces for facilitating organisational change. © 2024 The Authors
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17.
  • Baiocchi, Andrea, et al. (author)
  • Age of Information in CSMA-based Networks with Bursty Update Traffic
  • 2022
  • In: IEEE Access. - Piscataway : IEEE. - 2169-3536. ; 10, s. 44088-44105
  • Journal article (peer-reviewed)abstract
    • Exchanging status information between closely located mobile agents is an underlying process in numerous future Cyber Physical Systems (CPS). Real-time updates including positions of neighboring nodes is performed when, for example, autonomous vehicles execute a cooperative maneuver, industrial robots collaborate with each other on a task, or Unmanned Aerial Vehicles (UAVs) execute a mission in a swarm. For the design of networked automatic control strategies in these scenarios, it is essential to understand the performance of such Machine-to-Machine (M2M) communications from the information freshness perspective. To this end, we introduce a mathematical framework which allows characterizing the Age of Information (AoI) in networks governed by the Carrier-Sense Multiple Access (CSMA) protocol. Differently from existing work, we take into account the fact that update packets sent by mobile nodes are not necessarily periodic, since packet triggering is often coupled with agents’ mobility. Our approach is based on the assumption that diverse mobility-triggered message generation patterns can be modeled by a wide class of update traffic arrival processes. We apply Discrete Markovian Arrival Process (DMAP), which is a versatile arrival model able to fit arrival patterns that are modulated by a finite state machine, including bursty traffic. We develop an accurate and efficient analytical model of nodes exchanging one-hop broadcast update messages with bursty arrivals to evaluate the moments as well as entire probability distribution of several performance metrics, including AoI. An asymptotic analysis for large networks suggests a simple way to control the update message rate to minimize the AoI. We show that the optimal update rate that minimizes the mean AoI coincides with the optimum of the wireless channel utilization. Numerical examples point out that the asymptotic theory provides accurate predictions also for small values of the number of nodes. © 2013 IEEE.
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18.
  • Baiocchi, Andrea, et al. (author)
  • Age of Information in IEEE 802.11p
  • 2021
  • In: 2021 IFIP/IEEE International Symposium on Integrated Network Management (IM). - : IEEE. - 9783903176324 - 9781728190419 ; , s. 1024-1031
  • Conference paper (peer-reviewed)abstract
    • Vehicle-to-Everything (V2X) communication is essential for facilitating connected and automated driving, where vehicles and other road traffic participants share data instantaneously and cooperate to solve tricky traffic situations in milliseconds. This paper proposes two stochastic models for the V2X standard IEEE 802.11p to characterize amongst other things the Age of Information (AoI), a recently-proposed metric that measures the freshness of information. The first model is based on renewal process analysis of a tagged station with mean field approximation, while the second one adopts Markov chain approach with network level view. Analytical results show that IEEE 802.11p, given its adaptability to event-triggered and aperiodic messaging, supports advanced cooperative driving scenarios.
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19.
  • Baiocchi, Andrea, et al. (author)
  • To Buffer or Not To Buffer : IEEE 802.11p/bd Performance Under Different Buffering Strategies
  • 2021
  • In: 2021 33th International Teletraffic Congress (ITC-33). - Piscataway : Institute of Electrical and Electronics Engineers (IEEE). - 9783903176430 - 9781665478885
  • Conference paper (peer-reviewed)abstract
    • A fundamental paradigm of the Internet of Things (IoT) consists of agents that communicate updates to each other to perform joint actions, e.g., cooperative awareness in transportation systems, swarms of Unmanned Aerial Vehicles (UAVs), fleet of robots, automated assembly lines and logistics. A common feature of update messaging is emphasis on reliable throughput and freshness of collected data. We develop an analytical model that yields accurate predictions of all relevant metrics, both in terms of moments and probability distributions, for the case of one-hop broadcast update messages exchanged by using a CSMA-based wireless network. The model is validated against simulations and then applied to compare two update message scheduling approaches: providing a minimal buffer resource or providing no buffer. Surprisingly, we prove that having no buffer improves Age of Information (AoI) performance as well as message delivery rate, in spite of dropped packets. This is essentially due to much smaller congestion and hence collision probability in the wireless channel. From a system point of view this suggests a simple design of message handling, with no need of buffering and overwriting older messages. From a modeling point of view, the result supports the definition of simpler models that need not keep into account buffer state. © 2021 by IEEE.
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20.
  • Bao, Min, et al. (author)
  • On-line Thermal Aware Dynamic Voltage Scaling for Energy Optimization with Frequency/Temperature Dependency Consideration
  • 2009
  • In: <em></em>DAC '09 Proceedings of the 46th Annual Design Automation Conference. - New York, NY, USA : IEEE Computer Society. - 9781605584973 ; , s. 490-495
  • Conference paper (peer-reviewed)abstract
    • With new technologies, temperature has become a major issue to be considered at system level design. Without taking temperature aspects into consideration, no approach to energy or/and performance optimization will be sufficiently accurate and efficient. In this paper we propose an on-line temperature aware dynamic voltage and frequency scaling (DVFS) technique which is able to exploit both static and dynamic slack. The approach implies an offline temperature aware optimization step and on-line voltage/frequency settings based on temperature sensor readings. Most importantly, the presented approach is aware of the frequency/temperature dependency, by which important additional energy savings are obtained.
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21.
  • Bao, Min, et al. (author)
  • Temperature-aware idle time distribution for energy optimization with dynamic voltage scaling
  • 2010
  • In: Proceedings -Design, Automation and Test in Europe, DATE. - : IEEE. - 9783981080162 - 9781424470549 ; , s. 21-26
  • Conference paper (peer-reviewed)abstract
    • With new technologies, temperature has become a major issue to be considered at system level design. In this paper we propose a temperature aware idle time distribution technique for energy optimization with dynamic voltage scaling (DVS). A temperature analysis approach is also proposed which is accurate and, yet, sufficiently fast to be used inside the optimization loop for idle time distribution and voltage selection.
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22.
  • Bao, Min, et al. (author)
  • Temperature-Aware Idle Time Distribution for Leakage Energy Optimization
  • 2012
  • In: IEEE Transactions on Very Large Scale Integration (vlsi) Systems. - 1063-8210 .- 1557-9999. ; 20:7, s. 1187-1200
  • Journal article (peer-reviewed)abstract
    • Large-scale integration with deep sub-micron technologies has led to high power densities and high chip working temperatures. At the same time, leakage energy has become the dominant energy consumption source of circuits due to reduced threshold voltages. Given the close interdependence between temperature and leakage current, temperature has become a major issue to be considered for power-aware system level design techniques. In this paper, we address the issue of leakage energy optimization through temperature aware idle time distribution (ITD). We first propose an offline ITD technique to optimize leakage energy consumption, where only static idle time is distributed. To account for the dynamic slack, we then propose an online ITD technique where both static and dynamic idle time are considered. To improve the efficiency of our ITD techniques, we also propose an analytical temperature analysis approach which is accurate and, yet, sufficiently fast to be used inside the energy optimization loop.
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23.
  • Bao, Min, 2000-, et al. (author)
  • Temperature-Aware Task Mapping for Energy Optimization with Dynamic Voltage Scaling
  • 2008
  • In: 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2008. - : IEEE Computer Society. - 9781424422760 ; , s. 44-49
  • Conference paper (peer-reviewed)abstract
    • Temperature has become an important issue in nowadays MPSoCs design due to the ever increasing power densities and huge energy consumption. This paper proposes a temperature-aware task mapping technique for energy optimization in systems with dynamic voltage selection capability. It evaluates the efficiency of this technique, based on the analysis of the factors that can influence the potential gains that can be expected from such a technique, compared to a task mapping approach that ignores temperature.
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24.
  • Bao, Min, 2000-, et al. (author)
  • Temperature-Aware Voltage Selection for Energy Optimization
  • 2008
  • In: Design, Automation and Test in Europe, 2008. - : IEEE. - 9783981080131 ; , s. 1083-1086
  • Conference paper (peer-reviewed)abstract
    • This paper proposes a temperature-aware dynamic voltage selection technique for energy minimization and presents a thorough analysis of the parameters that influence the potential gains that can be expected from such a technique, compared to a voltage selection approach that ignores temperature.
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25.
  • Bavdek, Andrej, et al. (author)
  • Sterol and pH interdependence in the binding, oligomerization, and pore formation of Listeriolysin O.
  • 2007
  • In: Biochemistry. - : American Chemical Society (ACS). - 0006-2960 .- 1520-4995. ; 46:14, s. 4425-4437
  • Journal article (peer-reviewed)abstract
    • Listeriolysin O (LLO) is the most important virulence factor of the intracellular pathogen Listeria monocytogenes. Its main task is to enable escape of bacteria from the phagosomal vacuole into the cytoplasm. LLO belongs to the cholesterol-dependent cytolysin (CDC) family but differs from other members, as it exhibits optimal activity at low pH. Its pore forming ability at higher pH values has been largely disregarded in Listeria pathogenesis. Here we show that high cholesterol concentrations in the membrane restore the low activity of LLO at high pH values. LLO binds to lipid membranes, at physiological or even slightly basic pH values, in a cholesterol-dependent fashion. Binding, insertion into lipid monolayers, and permeabilization of calcein-loaded liposomes are maximal above approximately 35 mol % cholesterol, a concentration range typically found in lipid rafts. The narrow transition region of cholesterol concentration separating low and high activity indicates that cholesterol not only allows the binding of LLO to membranes but also affects other steps in pore formation. We were able to detect some of these by surface plasmon resonance-based assays. In particular, we show that LLO recognition of cholesterol is determined by the most exposed 3beta-hydroxy group of cholesterol. In addition, LLO binds and permeabilizes J774 cells and human erythrocytes in a cholesterol-dependent fashion at physiological or slightly basic pH values. The results clearly show that LLO activity at physiological pH cannot be neglected and that its action at sites distal to cell entry may have important physiological consequences for Listeria pathogenesis.
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26.
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27.
  • Berglund, Anders, 1974- (author)
  • Two facets of Innovation in Engineering Education : The interplay of Student Learning and Curricula Design
  • 2013
  • Doctoral thesis (other academic/artistic)abstract
    • This thesis covers two main perspectives ofinnovation; first, innovation is regarded as an outcome-related mechanism wherelearning is expressed through artefact presentations at the end of adevelopment process; second, innovation comprises a change mechanism in theprocess of student learning, influencing educators to reconsider new methods andpractices. Building on qualitative data from engineering design courses, theaim has been to explore how learning elements in engineering educationinfluence students during early-phase innovation. By implementing andpracticing learning elements, early-phase innovation could strengthen both currentand future engineering curricula, courses, and programmes.This thesis put attention to authentic experiences in which learning elementsis acted upon by students and targeted, defined, and refined by educators.Introducing learning elements need educators to manifest learning efforts moreexplicitly to match students’ capability to interpret new knowledge. Adoptinglearning elements that challenge existing paths of action are characterized by diversity, proactivity, opennessand motivation. For students to excel in the exploration of early-phaseinnovation, it is important to identify when, how and to what extent leaningelements can be reinforced. Thestrengthened understanding by students is mirrored in improved ability to takeaction and apply relevant knowledge in distinct learning situations. Theopportunity to influence student learning provides the design and redesign of curricula,courses and programmes as a prime feature to leaning elements relevant to early-phaseinnovation. To successfully pursue innovation in engineering education abalance is necessary between responsible actors integrating learning elementsand by those determined to learn.
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28.
  • Blessing, Simon, et al. (author)
  • Testing variational estimation of process parameters and initial conditions of an earth system model
  • 2014
  • In: Tellus. Series A: Dynamic Meteorology and Oceanography. - : Stockholm University Press. - 1600-0870. ; 66
  • Journal article (peer-reviewed)abstract
    • We present a variational assimilation system around a coarse resolution Earth System Model (ESM) and apply it for estimating initial conditions and parameters of the model. The system is based on derivative information that is efficiently provided by the ESM's adjoint, which has been generated through automatic differentiation of the model's source code. In our variational approach, the length of the feasible assimilation window is limited by the size of the domain in control space over which the approximation by the derivative is valid. This validity domain is reduced by non-smooth process representations. We show that in this respect the ocean component is less critical than the atmospheric component. We demonstrate how the feasible assimilation window can be extended to several weeks by modifying the implementation of specific process representations and by switching off processes such as precipitation.
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29.
  • Bordoloi, Unmesh D., et al. (author)
  • Customizing Instruction Set Extensible Reconfigurable Processors using GPUs
  • 2012
  • In: <em>25th International Conferennce on VLSI Design, Hyderabad, India, January 07-11, 2012.</em>. - : IEEE. - 9780769546384 - 9781467304382 ; , s. 418-423
  • Conference paper (peer-reviewed)abstract
    • Many reconfigurable processors allow their instruction sets to be tailored according to the performance requirements of target applications. They have gained immense popularity in recent years because of this flexibility of adding custom instructions. However, most design automation algorithms for instruction set customization (like enumerating and selecting the optimal set of custom instructions) are computationally intractable. As such, existing tools to customize instruction sets of extensible processors rely on approximation methods or heuristics. In contrast to such traditional approaches, we propose to use GPUs (Graphics Processing Units) to efficiently solve computationally expensive algorithms in the design automation tools for extensible processors. To demonstrate our idea, we choose a custom instruction selection problem and accelerate it using CUDA (CUDA is a GPU computing engine). Our CUDA implementation is devised to maximize the achievable speedups by various optimizations like exploiting on-chip shared memory and register usage. Experiments conducted on well known benchmarks show significant speedups over sequential CPU implementations as well as over multi-core implementations.
  •  
30.
  • Boyadjiev, Stefan I., et al. (author)
  • Study of the electrochromic properties of MAPLE and PLD deposited WO3 thin films
  • 2017
  • Conference paper (peer-reviewed)abstract
    • Tungsten trioxide (WO3) thin films were grown by matrix assisted pulsed laser evaporation (MAPLE) and pulsed laser deposition (PLD), and their properties were investigated for electrochromic applications. The structure, morphology and optical properties of these MAPLE and PLD grown from monoclinic WO3 nano-sized particles WO3 thin films were also studied. A KrF* excimer (λ=248 nm, ζFWHM=25 ns) laser source was used in all experiments. The films were studied by atomic force microscopy (AFM), grazing incidence X-ray diffraction (GIXRD) and Fourier transform infrared spectroscopy (FTIR). Cyclic voltammetry measurements were also performed in glove box with Ar atmosphere towards Li electrode, and the coloring and bleaching states were investigated. The morpho-structural investigations disclosed the synthesis of single-phase monoclinic WO3 films consisting of crystalline nano-grains embedded in an amorphous matrix. All thin films showed good electrochromic properties - strong coloration and fast and full bleaching. The effect was observed for many cycles, the strong coloration and full bleaching being preserved. These results are promising for future application of MAPLE and PLD deposited WO3 thin films in the development of electrochromic devices.
  •  
31.
  • Burisch, Johan, et al. (author)
  • Construction and validation of a web-based epidemiological database for inflammatory bowel diseases in Europe An EpiCom study
  • 2011
  • In: JOURNAL OF CROHNS and COLITIS. - : Elsevier Science B.v; Amsterdam. - 1873-9946 .- 1876-4479. ; 5:4, s. 342-349
  • Journal article (peer-reviewed)abstract
    • Background: The EpiCom-study investigates a possible East-West-gradient in Europe in the incidence of IBD and the association with environmental factors. A secured web-based database is used to facilitate and centralize data registration. Aim: To construct and validate a web-based inception cohort database available in both English and Russian language. Method: The EpiCom database has been constructed in collaboration with all 34 participating centers. The database was translated into Russian using forward translation, patient questionnaires were translated by simplified forward-backward translation. Data insertion implies fulfillment of international diagnostic criteria, disease activity, medical therapy, quality of life, work productivity and activity impairment, outcome of pregnancy, surgery, cancer and death. Data is secured by the WinLog3 System, developed in cooperation with the Danish Data Protection Agency. Validation of the database has been performed in two consecutive rounds, each followed by corrections in accordance with comments. Results: The EpiCom database fulfills the requirements of the participating countries local data security agencies by being stored at a single location. The database was found overall to be "good" or "very good" by 81% of the participants after the second validation round and the general applicability of the database was evaluated as "good" or "very good" by 77%. In the inclusion period January 1st -December 31st 2010 1336 IBD patients have been included in the database. Conclusion: A user-friendly, tailor-made and secure web-based inception cohort database has been successfully constructed, facilitating remote data input. The incidence of IBD in 23 European countries can be found at www.epicom-ecco.eu. (C) 2011 European Crohns and Colitis Organisation. Published by Elsevier B.V. All rights reserved.
  •  
32.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • A Quasi-Static Approach to Minimizing Energy Consumption in Real-Time Systems under Reward Constraints
  • 2006
  • In: 12th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2006. - : IEEE Computer Society. - 0769526764 ; , s. 279-286
  • Conference paper (peer-reviewed)abstract
    • In some real-time applications, it is desirable to trade off precision for timeliness. For such systems, considered typically under the Imprecise Computation model, a function assigns reward to the application depending on the amount of computation allotted to it. Also, many such applications run on battery-powered devices where the energy consumption is of utmost importance. We address in this paper the problem of energy minimization for Imprecise-Computation systems that have reward and time constraints. We propose a Quasi-Static (QS) approach that exploits, with low on-line overhead, the dynamic slack that arises from variations in the actual number of execution cycles: first, at design-time, a set of solutions are computed and stored (off-line phase); second, the selection among the precomputed assignments is left for run-time, based on actual values of time and reward (on-line phase).
  •  
33.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • An Approach to Reducing Verification Complexity of Real-Time Embedded Systems
  • 2002
  • In: 14th Euromicro Conference on Real-Time Systems ECRTS 2002, Work-in-Progress Session,2002. ; , s. 45-48
  • Conference paper (peer-reviewed)abstract
    • We present an approach to the formal verification of real-time embedded systems by using model checking. We address the verification of systems modeled in a timed Petri net representation and introduce a technique for reducing verification complexity. We translate the Petri net based model into timed automata and make use of availablemodel checking tools to prove the correctness of the system with respect to design properties expressed in the temporal logics CTL and TCTL. Experimental results demonstrate considerable improvements in verification efficiency when the degree of parallelism of the system is considered.
  •  
34.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Combining Static and Dynamic Scheduling for Real-Time Systems
  • 2004
  • In: Workshop on Software Analysis and Development for Pervasive Systems SONDA 2004,2004. - Southampton, UK : University of Southampton. ; , s. 32-
  • Conference paper (peer-reviewed)abstract
    • We address in this paper the combination of static and dynamic scheduling into an approach called quasi-static scheduling, in the context of real-time systems composed of hard and soft tasks. For the particular problem discussed in this paper, a single static schedule is too pessimistic while a purely dynamic scheduling approach causes a very high on-line overhead. In the proposed quasi-static solution we compute at design-time a set of schedules, and leave for run-time only the selection of a particular schedule based on the actual execution times. We propose an exact algorithm as well as heuristics that tackle the time and memory complexity of the problem. The approach is evaluated through synthetic examples.
  •  
35.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Definitions of Equivalence for Transformational Synthesis of Embedded Systems
  • 2000
  • In: 6th International Conference on Engineering of Complex Computer Systems ICECCS 2000,2000. - Tokyo, Japan : IEEE Computer Society Press. - 076950583X ; , s. 134-142
  • Conference paper (peer-reviewed)abstract
    • Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried out systematically. In this paper we present a computational model for embedded systems based on Petri nets called PRES+. It includes an explicit notion of time and allows a concise formulation of models. Tokens, in our notation, hold information and transitionsÑwhen firedÑperform transformation of data. Based on this model we define several notions of equivalence (reachable, behavioral, time, and total), which provide the framework for transformational synthesis of embedded systems. Different representations of an Ethernet network coprocessor are studied in order to illustrate the applicability of PRES+ and the definitions of equivalence on practical systems.
  •  
36.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Formal Coverification of Embedded Systems using Model Checking
  • 2000
  • In: 26th Euromicro Conference Digital Systems Design,2000. - Maastricht, The Netherlands : IEEE Computer Society Press. - 0769507808 ; , s. 106-113 vol.1
  • Conference paper (peer-reviewed)abstract
    • The complexity of embedded systems is increasing rapidly. In consequence, new verification techniques that overcome the limitations of traditional methods and are suitable for hardware/software systems are needed. In this paper we introduce a computational model for embedded systems based on Petri nets, called PRES. We present an approach to coverification of both the hardware and software parts of an embedded system represented by PRES. We use symbolic model checking to prove the correctness of such systems, specifying properties in CTL and verifying whether they are satisfied. This coverification method permits to reason formally about design properties as well as timing requirements. A medical monitoring system illustrates the feasibility of our approach on practical applications.
  •  
37.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • From Haskell to PRES+ Basic Translation Procedures
  • 2001
  • Reports (other academic/artistic)abstract
    • We define in this report some basic procedures to translate Haskell descriptions (based on a library of Skeletons) into PRES+ models. In this way, a system initially described in Haskell, may be transformed into a representation that might be formally verified. Thus the representa-tion of the system is verified using formal methods by model-checking the model against a set of required properties expressed by temporal logics. This work has been done in the frame of the SAVE project, which aims to study the specification and verification of heterogeneous elec-tronic systems.
  •  
38.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Hierarchical Modeling and Verification of Embedded Systems
  • 2001
  • In: Euromicro Symposium on Digital Systems Design,2001. - Warsaw, Poland : IEEE Computer Society Press. ; , s. 63-
  • Conference paper (peer-reviewed)abstract
    • In order to represent efficiently large systems, a mechanism for hierarchical composition is needed so that the model may be constructed in a structured manner and composed of simpler units easily comprehensible by the designer at each description level. In this paper we formally define the notion of hierarchy for a Petri net based representation used for modeling embedded systems. We show how small parts of a large system may be transformed by using the concept of hierarchy and the advantages of a transformational approach in the verification of embedded systems. A real-life example illustrates the feasibility of our approach on practical applications.
  •  
39.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Hierarchies for the Modeling and Verification of Embedded Systems
  • 2001
  • Reports (other academic/artistic)abstract
    • A flat representation of a realistic embedded system can be too big and complex to handle and understand. In order to represent efficiently large systems, a mechanism for hierarchical com-position is needed so that the model may be constructed in a structured manner and composed of simpler units easily comprehensible by the designer at each description level. In this report we formally define the notion of hierarchy for a Petri net based representation used for mode-ling embedded systems. We show how small parts of a large system may be transformed by using the concept of hierarchy as well as the advantages of a transformational approach in the verification of embedded systems. A real-life example illustrates the feasibility of our approach on practical applications. This work has been done in the frame of the SAVE project, which aims to study the specification and verification of heterogeneous electronic systems.
  •  
40.
  • Cortes, Luis-Alejandro, et al. (author)
  • Modeling and formal verification of embedded systems based on a Petri net representation
  • 2003
  • In: Journal of systems architecture. - 1383-7621 .- 1873-6165. ; 49:12-15, s. 571-598
  • Journal article (peer-reviewed)abstract
    • In this paper we concentrate on aspects related to modeling and formal verification of embedded systems. First, we define a formal model of computation for embedded systems based on Petri nets that can capture important features of such systems and allows their representation at different levels of granularity. Our modeling formalism has a well-defined semantics so that it supports a precise representation of the system, the use of formal methods to verify its correctness, and the automation of different tasks along the design process. Second, we propose an approach to the problem of formal verification of embedded systems represented in our modeling formalism. We make use of model checking to prove whether certain properties, expressed as temporal logic formulas, hold with respect to the system model. We introduce a systematic procedure to translate our model into timed automata so that it is possible to use available model checking tools. We propose two strategies for improving the verification efficiency, the first by applying correctness-preserving transformations and the second by exploring the degree of parallelism characteristic to the system. Some examples, including a realistic industrial case, demonstrate the efficiency of our approach on practical applications. © 2003 Elsevier B.V. All rights reserved.
  •  
41.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Modeling and Verification of Embedded Systems using Petri Net based Methods : Application to an Industrial Case
  • 2001
  • Reports (other academic/artistic)abstract
    • Embedded systems are becoming increasingly common in objects that we use in our everyday life. Embedded systems are typically characterized by their dedicated function and real-time behavior. Many of them must fulfill strict requirements in terms of reliability and correctness. Designing systems with such features, combined with high levels of complexity and tight time-to-market constraints, is a challenging task. In order to devise systems with such features, a formal design methodology is necessary to carry out systematically the different tasks along the design flow. The SAVE project aims at the development of a formal approach to specification, implementation, and verification of heterogeneous electronic systems. We have developed techniques for modeling and verifying embedded systems. This document reports the main results that have been obtained within the frame of SAVE in the fields of modeling and verification. An industrial system is used as study case in order to demonstrate the feasibility of the approach on practical applications.
  •  
42.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Quasi-Static Assignment of Voltages and Optional Cycles for Maximizing Rewards in Real-Time Systems with Energy Constraints
  • 2005
  • In: 42nd Design Automation Conference,2005. - Anaheim, CA, USA : IEEE Computer Society Press. - 1595930582 ; , s. 889-
  • Conference paper (peer-reviewed)abstract
    • There exist real-time systems for which it is possible to trade off precision for timeliness. In these cases, a function assigns reward to the application depending on the amount of computation allotted to it. At the same time, many such applications run on battery-powered devices with stringent energy constraints. This paper addresses the problem of maximizing rewards subject to time and energy constraints. We propose a quasi-static approach where the problem is solved in two steps: first, at design-time, a number of solutions are computed and stored (off-line phase); second, one of the precomputed solutions is selected at run-time based on actual values of time and energy (on-line phase). Thus our approach is able to exploit, with low on-line overhead, the dynamic slack caused by tasks executing less number of cycles than in the worst case. We conduct numerous experiments in order to show the advantages of our approach.
  •  
43.
  • Cortes, L.A., et al. (author)
  • Quasi-static assignment of voltages and optional cycles in imprecise-computation systems with energy considerations
  • 2006
  • In: IEEE Transactions on Very Large Scale Integration (vlsi) Systems. - 1063-8210 .- 1557-9999. ; 14:10, s. 1117-1129
  • Journal article (peer-reviewed)abstract
    • For some realtime systems, it is possible to tradeoff precision for timeliness. For such systems, typically considered under the imprecise computation model, a function assigns reward to the application depending on the amount of computation allotted to it. Also, these systems often have stringent energy constraints since many such applications run on battery powered devices. We address in this paper, the problem of maximizing rewards for imprecise computation systems that have energy constraints, more specifically, the problem of determining the voltage at which each task runs as well as the number of optional cycles such that the total reward is maximal while time and energy constraints are satisfied. We propose a quasi-static approach that is able to exploit, with low online overhead, the dynamic slack that arises from variations in the actual number of task execution cycles. In our quasi-static approach, the problem is solved in two steps: first, at design-time, a set of voltage/optional-cycles assignments are computed and stored (offline phase), second, the selection among the precomputed assignments is left for runtime, based on actual completion times and consumed energy (online phase). The advantages of the approach are demonstrated through numerous experiments with both synthetic examples and a real life application. © 2006 IEEE.
  •  
44.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Quasi-Static Scheduling for Multiprocessor Real-Time Systems with Hard and Soft Tasks
  • 2003
  • Reports (other academic/artistic)abstract
    • We address in this report the problem of scheduling for multiprocessor real-time systems comprised of hard and soft tasks. We use utility functions associated to soft tasks that capture their relative importance and how the quality of results is influenced when a soft deadline is missed. The problem is thus finding a task execution order that maximizes the total utility and guarantees meeting the hard deadlines. We consider time intervals rather than fixed execution times for tasks. On the one hand, a single static schedule computed off-line is too pessimistic. On the other hand, a purely on-line approach, which computes a new schedule every time a task completes considering the actual conditions, incurs an overhead that is unacceptable due to the high complexity of the problem. We propose a quasi-static solution where a number of schedules are computed at design-time, letting only for run-time the selection of a particular schedule based on the actual execution times. We propose an exact algorithm as well as heuristics that tackle the time and memory complexity of the problem. We evaluate our approach through synthetic examples and a realistic application.
  •  
45.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Quasi-Static Scheduling for Multiprocessor Real-Time Systems with Hard and Soft Tasks
  • 2005
  • In: 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications RTCSA05,2005. - Hong Kong : IEEE Computer Society Press. - 0769523463 ; , s. 422-
  • Conference paper (peer-reviewed)abstract
    • We address in this paper the problem of scheduling for multiprocessor real-time systems with hard and soft tasks. Utility functions are associated to soft tasks to capture their relative importance and how the quality of results is affected when a soft deadline is missed. The problem is to find a task execution order that maximizes the total utility and guarantees the hard deadlines. In order to account for actual execution times, we consider time intervals for tasks rather than fixed execution times. A single static schedule computed off-line is pessimistic, while a purely on-line approach, which computes a new schedule every time a task completes, incurs an unacceptable overhead. We propose therefore a quasi-static solution where a number of schedules are computed at design time, leaving for run-time only the selection of a particular schedule, based on the actual execution times. We propose an exact algorithm as well as heuristics that tackle the time and memory complexity of the problem. We evaluate our approach through synthetic examples and a realistic application.
  •  
46.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Quasi-Static Scheduling for Real-Time Systems with Hard and Soft Tasks
  • 2003
  • Reports (other academic/artistic)abstract
    • This report addresses the problem of scheduling for real-time systems that include both hard and soft tasks. In order to capture the relative importance of soft tasks and how the quality of results is affected when missing a soft deadline, we use utility functions associated to soft tasks. Thus the aim is to find the execution order of tasks that makes the total utility maximum and guarantees hard deadlines. We consider intervals rather than fixed execution times for tasks. Since a purely off-line solution is too pessimistic and a purely on-line approach incurs an unacceptable overhead due to the high complexity of the problem, we propose a quasi-static approach where a number of schedules are prepared at design-time and the decision of which of them to follow is taken at run-time based on the actual execution times. We propose an exact algorithm as well as different heuristics for the problem addressed in this report.
  •  
47.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Quasi-Static Scheduling for Real-Time Systems with Hard and Soft Tasks
  • 2004
  • In: Design, Automation and Test in Europe DATE 2004,2004. - Paris, France : IEEE Computer Society Press. - 0769520855 ; , s. 1176-
  • Conference paper (peer-reviewed)abstract
    • This paper addresses the problem of scheduling for real-time systems that include both hard and soft tasks. The relative importance of soft tasks and how the quality of results is affected when missing a soft deadline are captured by utility functions associated to soft tasks. Thus the aim is to find the execution order of tasks that makes the total utility maximum and guarantees hard deadlines. We consider time intervals rather than fixed execution times for tasks. Since a purely off-line solution is too pessimistic and a purely on-line approach incurs an unacceptable overhead due to the high complexity of the problem, we propose a quasi-static approach where a number of schedules are prepared at design-time and the decision of which of them to follow is taken at run-time based on the actual execution times. We propose an exact algorithm as well as different heuristics for the problem addressed in this paper.
  •  
48.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Static Scheduling of Monoprocessor Real-Time Systems composed of Hard and Soft Tasks
  • 2003
  • Reports (other academic/artistic)abstract
    • In this report we address the problem of static scheduling of real-time systems that include both hard and soft tasks. We consider systems in which both hard and soft tasks are periodic, and our analysis take into account the data dependencies among tasks. In order to capture the relative importance of soft tasks and how the quality of results is affected when missing a soft deadline, we use utility functions associated to soft tasks. Thus our objective is to find a schedule that maximizes the total utility and at the same time guarantees hard deadlines. We use the expected duration of tasks for evaluating utility functions whereas we use the maximum duration of tasks for ensuring that hard deadlines are always met. We show that the problem we study in this report is NP-complete and we present an algorithm that finds the optimal schedule as well as different heuristics that find near-optimal solutions at reasonable computational cost.
  •  
49.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Static Scheduling of Monoprocessor Real-Time Systems composed of Hard and Soft Tasks
  • 2004
  • In: The IEEE International Workshop on Electronic Design, Test and Applications DELTA 2004,2004. - 0769520812 ; , s. 115-120
  • Conference paper (peer-reviewed)abstract
    • In this paper we address the problem of static scheduling of real-time systems that include both hard and soft tasks. We consider that hard as well as soft tasks are periodic and that there exist data dependencies among tasks. In order to capture the relative importance of soft tasks and how the quality of results is affected when missing a soft deadline, we use utility functions associated to soft tasks. Thus our objective is to find an execution order for tasks that maximizes the total utility and at the same time guarantees hard deadlines. We use the expected duration of tasks for evaluating utility functions whereas we use the maximum duration of tasks for ensuring that hard deadlines are always met. We present an algorithm for finding the optimal schedule and also different heuristics that find near-optimal solutions at reasonable computational cost. The proposed algorithms are evaluated using a large number of synthetic examples.
  •  
50.
  • Cortes, Luis-Alejandro, 1972-, et al. (author)
  • Verification Methodology for Heterogeneous Hardware/Software Systems
  • 2000
  • Reports (other academic/artistic)abstract
    • Modern electronic systems are constituted by heterogeneous elements, e.g. hardware/software, and are typically embedded. The complexity of this kind of systems is such, that traditional validation techniques, like simulation and testing, are not enough to verify the correctness of these systems. In consequence, new formal verification techniques that overcome the limitations of traditional validation methods and are suitable for hardware/software systems are needed. Formal methods require the system to be represented by a formal computational model with clear semantics. We present a Petri net based representation, called PRES, which is able to capture information relevant to embedded systems. This report also explores an approach to formal verification of embedded systems in which the underlying representation is PRES. We use symbolic model checking to prove the correctness of such systems, specifying properties in CTL and verifying whether they hold under all possible situations. This coverification method permits to reason formally about design properties as well as timing requirements. This work has been done in the frame of the SAVE project, which aims to study the specification and verification of heterogeneous electronic systems.
  •  
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