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Träfflista för sökning "WFRF:(Gomeniuk Y. Y.) "

Search: WFRF:(Gomeniuk Y. Y.)

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1.
  • Gomeniuk, Y. Y., et al. (author)
  • Electrical properties of high-k LaLuO3 gate oxide for SOI MOSFETs
  • 2011
  • In: 6th International Workshop on Semiconductor-on-Insulator Materials and Devices. - 9783037851784 ; , s. 87-93
  • Conference paper (peer-reviewed)abstract
    • The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-? LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO 3/Si interface is presented and typical maxima of 1.2×10 11 eV-1cm-2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 μm and 50 μm, respectively) are presented. The front channel mobility appeared to be 126 cm2V -1s-1 and 70 cm2V-1s-1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.
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2.
  • Nazarov, A. N., et al. (author)
  • Charge trapping in ultrathin Gd2O3 high-k dielectric
  • 2007
  • In: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 84:9-10, s. 1968-1971
  • Journal article (peer-reviewed)abstract
    • Charge trapping in ultrathin high-k Gd2O3 dielectric leading to appearance of hysteresis in C-V curves is studied by capacitance-voltage and current-voltage techniques. It was shown that the large leakage current at a negative gate voltage causes the generation of the positive charge in the dielectric layer, resulting in the respective shift of the C-V curve. The capture cross-section of the hole traps is around 2 x 10(-20) cm(2). The distribution of the interface states was measured by conductance technique showing the concentration up to 7.5 x 10(12) eV(-1) cm(-2) near the valence band edge.
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3.
  • Gomeniuk, Y. Y, et al. (author)
  • Electrical properties of LaLuO3/Si(100) structures prepared by molecular beam deposition
  • 2010
  • In: ECS Transactions. - : The Electrochemical Society. - 1938-5862 .- 1938-6737. - 9781566778220 ; 33:3, s. 221-227
  • Conference paper (peer-reviewed)abstract
    • The paper presents the results of electrical characterization in the wide temperature range (120-320 K) of the interface and bulk properties of high-k LaLuO3 dielectric deposited by molecular beam deposition (MBD) on silicon substrate. The energy distribution of interface state density is presented and typical maxima of 1.2×1011 and 2.5×10 11 eV-1 cm-2 were found at about 0.25-0.3 eV from the silicon valence band. The charge carrier transport through the dielectric at the forward bias was found to occur via Poole-Frenkel mechanism, while variable range hopping conduction (Mott's law) controls the current at the reverse bias.
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4.
  • Gomeniuk, Y., et al. (author)
  • Low-temperature conductance measurements of surface states in HfO2-Si structures with different gate materials
  • 2006
  • In: Materials Science in Semiconductor Processing. - : Elsevier BV. - 1369-8001 .- 1873-4081. ; 9:6, s. 980-984
  • Journal article (peer-reviewed)abstract
    • Metal-oxide-semiconductor capacitors based on HfO2 gate stack with different metal and metal compound gates (Al, TiN, NiSi and NiAlN) are compared to study the effect of the gate electrode material on the trap density at the insulator-semiconductor interface. C-V and G-omega measurements were made in the frequency range from 1 kHz to 1 MHz in the temperature range 180-300 K. From the maximum of the plot G/omega vs. ln(omega) the density of interface states was calculated, and from its position on the frequency axis the trap cross-section was found. Reducing temperature makes it possible to decrease leakage current through the dielectric and to investigate the states located closer to the band edge. The structures under study were shown to contain significant interface trap densities located near the valence band edge (around 2 x 10(11) cm(-2)eV(-1) for Al and up to (3.5-5.5) x 10(12)cm(-2)eV(-1) for other gate materials). The peak in the surface state distribution is situated at 0.18 eV above the valence band edge for Al electrode. The capture cross-section is 5.8 x 10(-17)cm(2) at 200 K for Al-HfO2-Si structure.
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