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- Tomoaia, Raluca, et al.
(author)
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Novel 3D versus traditional transesophageal echocardiography techniques : Defining differences in the diagnosis of infective endocarditis
- 2024
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In: European Journal of Clinical Investigation. - : John Wiley & Sons. - 0014-2972 .- 1365-2362. ; 54:2
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Research review (peer-reviewed)abstract
- BackgroundDespite the availability of current antibiotic and surgical treatment options, infective endocarditis (IE) remains associated with a high mortality rate. Even though two-dimensional (2D) transesophageal echocardiography (TOE) is a major criteria in the diagnosis of IE, it is constrained by the single-plane orientation. Since three-dimensional (3D) TOE provides a comprehensive understanding of the cardiac architecture by allowing for a realistic visualization of the underlying structures in 3D space, it has attracted considerable interest in recent years.AimThe purpose of this narrative review is to discuss the advantages and pitfalls of 3D TOE in patients with IE, as well as to address emerging photo-realistic 3D techniques that have the potential to enhance the visualization of cardiac structures in this setting.ResultsAccording to recent research, 3D TOE acquisitions outperform 2D acquisitions in terms of vegetation identification accuracy and embolism risk assessment. By reporting a variety of findings that are missed with 2D TOE, but which are validated by surgical examination, 3D TOE further improves the ability to identify endocarditis complications on both native and prosthetic valves. In addition to conventional 3D TOE, future developments in 3D technology led to the development of transillumination and tissue-transparency rendering, which may improve anatomical understanding and depth perception. Due to the use of both conventional and novel 3D techniques, there are more patients who require surgical intervention, indicating that 3D TOE may have a clinical relevance on the surgical management.Conclusion3D TOE might fill the gaps left by 2D TOE in the diagnosis of IE.
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- Pop, Ruxandra
(author)
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Mapping Concurrent Applications to Multiprocessor Systems with Multithreaded Processors and Network on Chip-Based Interconnections
- 2011
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Licentiate thesis (other academic/artistic)abstract
- Network on Chip (NoC) architectures provide scalable platforms for designing Systems on Chip (SoC) with large number of cores. Developing products and applications using an NoC architecture offers many challenges and opportunities. A tool which can map an application or a set of applications to a given NoC architecture will be essential.In this thesis we first survey current techniques and we present our proposals for mapping and scheduling of concurrent applications to NoCs with multithreaded processors as computational resources.NoC platforms are basically a special class of Multiprocessor Embedded Systems (MPES). Conventional MPES architectures are mostly bus-based and, thus, are exposed to potential difficulties regarding scalability and reusability. There has been a lot of research on MPES development including work on mapping and scheduling of applications. Many of these results can also be applied to NoC platforms.Mapping and scheduling are known to be computationally hard problems. A large range of exact and approximate optimization algorithms have been proposed for solving these problems. The methods include Branch-and–Bound (BB), constructive and transformative heuristics such as List Scheduling (LS), Genetic Algorithms (GA) and various types of Mathematical Programming algorithms.Concurrent applications are able to capture a typical embedded system which is multifunctional. Concurrent applications can be executed on an NoC which provides a large computational power with multiple on-chip computational resources.Improving the time performances of concurrent applications which are running on Network on Chip (NoC) architectures is mainly correlated with the ability of mapping and scheduling methodologies to exploit the Thread Level Parallelism (TLP) of concurrent applications through the available NoC parallelism. Matching the architectural parallelism to the application concurrency for obtaining good performance-cost tradeoffs is another aspect of the problem.Multithreading is a technique for hiding long latencies of memory accesses, through the overlapped execution of several threads. Recently, Multi-Threaded Processors (MTPs) have been designed providing the architectural infrastructure to concurrently execute multiple threads at hardware level which, usually, results in a very low context switching overhead. Simultaneous Multi-Threaded Processors (SMTPs) are superscalar processor architectures which adaptively exploit the coarse grain and the fine grain parallelism of applications, by simultaneously executing instructions from several thread contexts.In this thesis we make a case for using SMTPs and MTPs as NoC resources and show that such a multiprocessor architecture provides better time performances than an NoC with solely General-purpose Processors (GP). We have developed a methodology for task mapping and scheduling to an NoC with mixed SMTP, MTP and GP resources, which aims to maximize the time performance of concurrent applications and to satisfy their soft deadlines. The developed methodology was evaluated on many configurations of NoC-based platforms with SMTP, MTP and GP resources. The experimental results demonstrate that the use of SMTPs and MTPs in NoC platforms can significantly speed-up applications.
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