| 1. |
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| 2. |
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| 3. |
- de Graauw, Th., et al.
(author)
-
The Herschel-Heterodyne Instrument for the Far-Infrared (HIFI)
- 2010
-
In: Astronomy and Astrophysics. - : EDP Sciences. - 0004-6361 .- 1432-0746. ; 518, s. L6-
-
Journal article (peer-reviewed)abstract
- Aims: This paper describes the Heterodyne Instrument for the Far-Infrared (HIFI) that was launched onboard ESA's Herschel Space Observatory in May 2009. Methods: The instrument is a set of 7 heterodyne receivers that are electronically tuneable, covering 480-1250 GHz with SIS mixers and the 1410-1910 GHz range with hot electron bolometer (HEB) mixers. The local oscillator (LO) subsystem comprises a Ka-band synthesizer followed by 14 chains of frequency multipliers and 2 chains for each frequency band. A pair of auto-correlators and a pair of acousto-optical spectrometers process the two IF signals from the dual-polarization, single-pixel front-ends to provide instantaneous frequency coverage of 2 × 4 GHz, with a set of resolutions (125 kHz to 1 MHz) that are better than 0.1 km s-1. Results: After a successful qualification and a pre-launch TB/TV test program, the flight instrument is now in-orbit and completed successfully the commissioning and performance verification phase. The in-orbit performance of the receivers matches the pre-launch sensitivities. We also report on the in-orbit performance of the receivers and some first results of HIFI's operations. Herschel is an ESA space observatory with science instruments provided by European-led Principal Investigator consortia and with important participation from NASA.
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| 4. |
- Hassona, Ahmed Adel, 1988, et al.
(author)
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A Low-loss D-band Chip-to-Waveguide Transition Using Unilateral Fin-line Structure
- 2018
-
In: IEEE MTT-S International Microwave Symposium Digest. - 0149-645X. ; 2018-June, s. 390-393
-
Conference paper (peer-reviewed)abstract
- This paper presents a D-band interconnect realized using unilateral finline structure. The interconnect consists of a microstrip line implemented on a 75μm-thick SiC substrate. The line then couples to a unilateral finline taper that is mounted in the E-plane of a standard WR-6.5 D-band waveguide. The interconnect achieves low insertion loss and covers very wide frequency range. The measured minimum insertion loss is 0.67 dB and the maximum is 2 dB per transition across the entire D-band covering the frequency range 110-170 GHz. The transition does not require any galvanic contacts nor any special processing and can be implemented in any of the commercially available semiconductor technologies. This solution provides low-loss wideband packaging technique that enables millimeter-wave systems assembly using a high-performance simple approach.
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| 5. |
- Hassona, Ahmed Adel, 1988, et al.
(author)
-
Compact Low-Loss Chip-to-Waveguide and Chip-to-Chip Packaging Concept Using EBG Structures
- 2021
-
In: IEEE Microwave and Wireless Components Letters. - 1558-1764 .- 1531-1309. ; 31:1, s. 9-12
-
Journal article (peer-reviewed)abstract
- This letter presents a novel approach for packaging millimeter-wave (mmW) and terahertz (THz) circuits. The proposed technique relies on using an on-chip coupling structure that couples the signal to a quarter-wavelength cavity, which in turn couples to either a waveguide (WG) or another chip. The solution also uses a periodic electromagnetic bandgap (EBG) structure that controls the electromagnetic wave and prevents field leakage in undesired directions. The proposed solution is fabricated and demonstrated at the D-band (110-170 GHz), and the measurement results show that it achieves a minimum insertion loss of 0.8 and a 3-dB bandwidth extending from 124 to 161 GHz. The proposed approach does not require any galvanic contacts and can be used for packaging integrated circuits in WG modules as well as for chip-to-chip communication.
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| 6. |
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| 7. |
- Abbasi, Morteza, 1982, et al.
(author)
-
A 80-95 GHz direct quadrature modulator in SiGe technology
- 2014
-
In: SiRF 2014 - 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems. - 9781479915231 ; , s. 56-58
-
Conference paper (peer-reviewed)abstract
- A direct carrier IQ modulator operating in the 80-95 GHz frequency range is presented. The circuit is designed and fabricated in 0.18μm SiGe technology with 170/250 GHz fT/fmax. The modulator is based on double-balanced gilbert mixer cells with on-chip quadrature LO phase shifter and consumes 23mW DC power. In single-sideband operation, the chip exhibits up to 3 dB conversion gain below 85 GHz and -1± 0.5 dB up to 95 GHz. The image rejection ratio and LO-RF isolation are as high as 25 dB and 43 dB respectively. The modulator can operate with 10 GHz of modulation bandwidth and delivers -7 dBm power in saturation. For demonstration, the circuit is tested and shown to be capable of transmitting 4Gbps BPSK signal with NRZ rectangular pulses. The active chip area is 480μm× 260μm. © 2014 IEEE.
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| 8. |
- Abbasi, Morteza, 1982, et al.
(author)
-
A Broadband 60-to-120 GHz single-chip MMIC multiplier chain
- 2009
-
In: IEEE MTT-S International Microwave Symposium Digest. - 0149-645X. ; , s. 441-444
-
Conference paper (peer-reviewed)abstract
- This paper presents a single-chip 60 GHz to 120 GHz frequency multiplier chain based on 0.1 ?m GaAs mHEMT. The MMIC can deliver 3 to 5 dBm of output power from 110 GHz to 130 GHz with 2 dBm input power and consumes only 65 mW of DC power. The signal at the fundamental frequency is suppressed more than 20 dB over the band of interest. The impedance matching networks are realized using coupled transmission lines.
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| 9. |
- Abbasi, Morteza, 1982, et al.
(author)
-
A broadband differential cascode power amplifier in 45 nm CMOS for high-speed 60 GHz system-on-chip
- 2010
-
In: 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010; Anaheim, CA; 23 May 2010 through 25 May 2010. - 1529-2517. ; , s. 978-142446242-1-
-
Conference paper (peer-reviewed)abstract
- A compact two-stage differential cascode power amplifier is designed and fabricated in 45 nm standard LP CMOS. The cascode configuration, with the common gate device placed in a separate P-well, provides reliable operating condition for the devices. The amplifier shows 20 dB small-signal gain centered at 60 GHz with a flat frequency response and 1-dB bandwidth of 10 GHz. The broadband large-signal operation is also ensured by providing constant load resistance to both stages over the entire band and coupling them with a dual resonance matching network. The chip delivers 11.2 dBm output power at 1-dB compression and up to 14.5 dBm power in saturation. The power amplifier operates with 2 V supply and draws 90 mA total current which results in 14.4% maximum PAE. The output third order intercept point is measured to be 18 dBm for two-tone measurement at 60 GHz with 0.5 GHz, 1 GHz and 2 GHz frequency separations. © 2010 IEEE.
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| 10. |
- Abbasi, Morteza, 1982, et al.
(author)
-
A direct conversion quadrature transmitter with digital interface in 45 nm CMOS for high-speed 60 GHz communications
- 2011
-
In: Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium. Baltimore, 5-7 June 2011. - 1529-2517. - 9781424482931
-
Conference paper (peer-reviewed)abstract
- A compact 60 GHz direct conversion quadrature transmitter is designed and fabricated in 45 nm standard LP CMOS. The transmitter features an integrated power amplifier with continuous output level control and interfaces binary data signals with nominal peak-to-peak voltage swing of 300 mV. The highest measured modulation bandwidth is limited by the measurement setup to 4 GHz but is simulated to be as high as 10 GHz. In single sideband up-converting operation mode, the measured image suppression ratio is 22 dB with 36 dB of carrier suppression corresponding to approximately 8% EVM in the output signal constellation. The output RF frequency can be from 54 GHz to 66 GHz to accommodate several channels and the output power can be adjusted from -3 dBm to 10 dBm. The chip is operated from a 2 V supply and draws 180 mA current.
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| 11. |
- Abbasi, Morteza, 1982, et al.
(author)
-
An E-Band(71-76, 81-86 GHz) Balanced Frequency Tripler for High-Speed Communications
- 2009
-
In: APMC: 2009 ASIA PACIFIC MICROWAVE CONFERENCE. - 9781424428014 ; 1-5, s. 1184-1187
-
Conference paper (other academic/artistic)abstract
- An E-Band transistor-based balanced frequency tripler is implemented using a 0.15 mu m GaAs mHEMT process which can be integrated into a single-chip RF front-end. The balanced configuration with 90 degrees hybrids at the input and output improves the port impedance matching which is measured to be better than 15 dB at the input and 10 dB at the output over the frequencies of interest. The tripler has a conversion loss of 11.5 dB from 71 GHz to 76 GHz and 14 dB from 81 GHz to 86 GHz. The second and forth harmonics are suppressed by more than 30 dB and the fundamental frequency by 20 dB. The tripler can deliver -2 dBm output power.
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| 12. |
- Abbasi, Morteza, 1982, et al.
(author)
-
Direct carrier quadrature modulator and Demodulator MMICs for 60 GHz gigabit wireless communications
- 2011
-
In: Asia-Pacific Microwave Conference Proceedings (APMC 2011; Melbourne, VIC; 5 - 8 December 2011). - 9780858259744 ; , s. 1134-1137
-
Conference paper (other academic/artistic)abstract
- A 60 GHz direct carrier quadrature modulator is designed and fabricated in 0.15 μm mHEMT technology. The design is based on passive mixers and therefore reciprocal which makes it possible to be used both as modulator and demodulator. The modulator has an input bandwidth of 0-5 GHz on each of the I and Q ports and an RF bandwidth of 53-68 GHz. Carrier leakage to the output port is eliminated by addition of an inductive path from the LO port to the RF port. The modulator requires 5 dBm LO power and can output up to -6 dBm RF power in linear region and up to -4 dBm when driven into saturation. When operated as an SSB mixer, the conversion loss is measured to be 11 dB and image and LO signals are suppressed by as much as 30 dB compared to the desired signal. For demonstration, a pair of the presented modulator/demodulator is used to transmit 7Gbps BPSK signal over 1m and 10Gbps QPSK signal over 0.5m wireless link.
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| 13. |
- Abbasi, Morteza, 1982, et al.
(author)
-
Single-Chip 220-GHz Active Heterodyne Receiver and Transmitter MMICs With On-Chip Integrated Antenna
- 2011
-
In: IEEE Transactions on Microwave Theory and Techniques. - 0018-9480 .- 1557-9670. ; 59:2, s. 466-478
-
Journal article (peer-reviewed)abstract
- This paper presents the design and characterization of single-chip 220-GHz heterodyne receiver (RX) and transmitter (TX) monolithic microwave integrated circuits (MMICs) with integrated antennas fabricated in 0.1-mu m GaAs metamorphic high electron-mobility transistor technology. The MMIC receiver consists of a modified square-slot antenna, a three-stage low-noise amplifier, and a sub-harmonically pumped resistive mixer with on-chip local oscillator frequency multiplication chain. The transmitter chip is the dual of the receiver chip by inverting the direction of the RF amplifier. The chips are mounted on 5-mm silicon lenses in order to interface the antenna to the free space and are packaged into two separate modules. The double-sideband noise figure (NF) and conversion gain of the receiver module are measured with the Y-factor method. The total noise temperature of 1310 +/- 100K(corresponding to an NF of 7.4 dB), including the losses in the lens and antenna, is measured at 220 GHz with a respective conversion gain of 3.5 dB. The radiated continuous-wave power from the transmitter module is measured to be up to -6 dBm from 212 to 226 GHz. The transmitter and receiver are linked in a quasi-optical setup and the IF to IF response is measured to be flat up to 10 GHz. This is verified to be usable for transmission of a 12.5-Gb/s data stream between the transmit and receive modules over a 0.5-m wireless link. The modules operate with a 1.3-V supply and each consume 110-mW dc power. The presented 220-GHz integrated circuits and modules can be used in a variety of applications, including passive and active imaging, as well as high-speed data communications. To the best of our knowledge, these MMICs are the highest frequency single-chip low-noise heterodyne receiver and transmitter pair reported to date.
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| 14. |
- Abbasi, Morteza, 1982, et al.
(author)
-
Single-Chip Frequency Multiplier Chains for Millimeter-Wave Signal Generation
- 2009
-
In: IEEE Transactions on Microwave Theory and Techniques. - 0018-9480 .- 1557-9670. ; 57:12, s. 3134-3142
-
Journal article (peer-reviewed)abstract
- Two single-chip frequency multiplier chains targeting 118 and 183 GHz output frequencies are presented. The chips are fabricated in a 0.1 mu m GaAs metamorphic high electron-mobility transistor process. The D-band frequency doubler chain covers 110 to 130 GHz with peak output power of 5 dBm. The chip requires 2 dBm input power and consumes only 65 mW of dc power. The signal at the fundamental frequency is suppressed more than 25 dB compared to the desired output signal over the band of interest. The G-band frequency sextupler (x6) chain covers 155 to 195 GHz with 0 dBm peak output power and requires 6.5 dBm input power and 92.5 mW dc power. The input signal to the multiplier chain can be reduced to 4 dBm while the output power drops only by 0.5 dB. The unwanted harmonics are suppressed more than 30 dB compared to the desired signal. An additional 183 GHz power amplifier is presented to be used after the x6 frequency multiplier chain if higher output power is required. The amplifier delivers 5 dBm output power with a small-signal gain of 9 dB from 155 to 195 GHz. The impedance matching networks are realized using coupled transmission lines which is shown to be a scalable and straightforward structure to use in amplifier design. Microstrip transmission lines are used in all the designs.
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| 15. |
- An, Sining, 1991, et al.
(author)
-
A 40 Gbps DQPSK Modem for Millimeter-wave Communications
- 2016
-
In: Asia-Pacific Microwave Conference Proceedings APMC 2015. ; 1
-
Conference paper (peer-reviewed)abstract
- A high speed differential quadrature phase shift keying (DQPSK) modulator and demodulator (modem) is presented for data rates up to 40 Gbps, in which the modulator is based on an FPGA and the demodulator is based on analog components. The modem performance has been verified in a lab environment. The targeted application is wireless communications using millimeter-wave bands as a flexible alternative to optical fiber links in next generation mobile networks.
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| 16. |
- An, Sining, 1991, et al.
(author)
-
A D-band Dual-Mode Dynamic Frequency Divider in 130nm SiGe Technology
- 2020
-
In: IEEE Microwave and Wireless Components Letters. - 1558-1764 .- 1531-1309. ; 30:12, s. 1169-1172
-
Journal article (peer-reviewed)abstract
- In this work, a dual-mode (divide-by-2 and divide-by-3) dynamic frequency divider is presented. A tunable delay gated ring oscillator (TDGRO) topology is proposed for dual-mode operation and bandwidth extension. It uses a 130 nm gate length SiGe BiCMOS technology with ft and fmax of 250 GHz and 370 GHz, respectively. Verification shows that it works at W-band from 70 GHz to 114 GHz (47.8% bandwidth) for divide-by-2 and works at D-band from 105 GHz to 160 GHz (41.5% bandwidth) for divide-by-3. This divider can be used in integrated phase lock loops (PLLs) at millimeter-wave frequencies.
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| 17. |
- An, Sining, 1991, et al.
(author)
-
A Synchronous Baseband Receiver for High-Data-Rate Millimeter-Wave Communication Systems
- 2019
-
In: IEEE Microwave and Wireless Components Letters. - 1558-1764 .- 1531-1309. ; 29:6, s. 412-414
-
Journal article (peer-reviewed)abstract
- A novel synchronous baseband receiver is presented in this letter. With a pilot tone insertion at the transmitter, the proposed baseband receiver can perform carrier recovery (CR) regardless of modulation scheme and/or baud rate. The synchronous baseband receiver has an analog-digital hybrid structure, where a low-cost digital signal processor controls an analog local oscillator (LO) in frequency and phase to achieve CR. This structure requires only one low-cost analog-to-digital converter (ADC) with a sampling rate of 100 MS/s. A proof-of-concept demonstration at E-band achieves 9-Gb/s 64-quadratic-amplitude modulation (QAM) and 16-Gb/s QPSK transmissions.
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| 18. |
- An, Sining, 1991, et al.
(author)
-
An 8 Gbps E-band QAM Transmitter Using Symbol-based Outphasing Power Combining Technique
- 2017
-
In: Radio-Frequency Integration Technology (RFIT2017). - 9781509040360 ; , s. 150-152
-
Conference paper (peer-reviewed)abstract
- In millimeter-wave communication systems, generating high output power with high efficiency on the transmitter side is one major challenge. In this paper, a symbol-based outphasing power combining solution has been demonstrated with data rate up to 8 Gbps at an RF frequency of 83.5 GHz. This solution provides 2 dB higher output power compared to the power of two QAM signals at 12% EVM.
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| 19. |
- An, Sining, 1991, et al.
(author)
-
Coded Pilot Assisted Baseband Receiver for High Data Rate Millimeter-Wave Communications
- 2020
-
In: IEEE Transactions on Microwave Theory and Techniques. - 0018-9480 .- 1557-9670. ; 68:11, s. 4719-4727
-
Journal article (peer-reviewed)abstract
- A coded pilot assisted high data rate millimeter-wave receiver topology is presented in this article. A low data rate and low power pseudorandom noise (pn) coded pilot signal is superimposed at the transmitter, and the receiver can use such pilot for carrier recovery (CR) and/or channel estimation regardless of modulation scheme or communication data rate. The proposed baseband receiver has an analog-digital hybrid structure where a low-cost digital signal processor is used. This structure requires only a low-cost analog-to-digital converter (ADC) with a sampling rate of 40 MSPS. A proof-of-concept communication link at E-band is demonstrated with 18 Gbps 64-quadrature amplitude modulation (QAM) and 24 Gbps 16-QAM.
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| 20. |
- An, Sining, 1991, et al.
(author)
-
Micrometer Accuracy Phase Modulated Radar for Distance Measurement and Monitoring
- 2020
-
In: IEEE Sensors Journal. - 1558-1748 .- 1530-437X. ; 20:6, s. 2919-2927
-
Journal article (peer-reviewed)abstract
- An enhanced accuracy random binary phase modulated radar is proposed. It can be used in high accuracy monitoring in manufacturing. Compared with the traditional high accuracy radar using frequency modulated continuous wave (FMCW), the proposed radar system can be used in a multi-user scenario without occupying more bandwidth. A two-step distance estimation method is introduced to estimate the distance. First, the distance estimation accuracy is narrowed down to a half carrier wavelength by analyzing the envelope of the phase modulated signal. Then the carrier phase information increases the distance accuracy to several micrometers. An equalization method is introduced to solve the I/Q imbalance problem. The proposed radar system is demonstrated at a carrier frequency of 80 GHz with a bandwidth of 2 GHz. The measured distance error was within ±7 μm. In addition, a high measurement repetition rate of 500 kHz was reached which is suitable for real-time monitoring in automatic manufacturing.
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| 21. |
- An, Sining, 1991, et al.
(author)
-
Millimeter-Wave Multi-Channel Backscatter Communication and Ranging with an FMCW Radar
- 2022
-
In: Sensors. - : MDPI AG. - 1424-8220. ; 22:19
-
Journal article (peer-reviewed)abstract
- A multi-channel backscatter communication and radar sensing system is proposed and demonstrated in this paper. Frequency modulated continuous wave (FMCW) radar ranging is integrated with simultaneous uplink data transmission from a self-packaged active radio frequency (RF) tag. A novel package solution is proposed for the RF tag. With the proposed package, the RF tag can transmit a 32-QAM signal up to 2.5 Gbps and QPSK signal up to 8 Gbps. For a multi-tag scenario, we proposed using spread spectrum code to separate the data from each tag. In this case, tags can be placed at arbitrary locations without adjacent channel interference. Proof-of-concept simulations and measurements are demonstrated. A 625 Mbps data rate is achieved in a dual-tag scenario for two tags.
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| 22. |
- Andersson, Christer, 1982, et al.
(author)
-
A SiC Varactor With Large Effective Tuning Range for Microwave Power Applications
- 2011
-
In: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 32:6, s. 788-790
-
Journal article (peer-reviewed)abstract
- SiC Schottky diode varactors have been fabricated for use in microwave power applications, specifically the dynamic load modulation of power amplifiers. A custom doping profile has been employed to spread the C(V) over a large bias voltage range, thereby increasing the effective tuning range under large voltage swing conditions. The small-signal tuning range is approximately six, and punch through is reached at a bias voltage of -60 V, while the breakdown voltage is on the order of -160 V. An interdigitated layout is utilized together with a self-aligned Schottky anode etch process to improve the Q-factor at 2 GHz, which is 20 at zero bias and approximately 160 at punch through.
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| 23. |
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| 24. |
- Andersson, Kristoffer, 1976, et al.
(author)
-
Fabrication and characterization of field-plated buried-gate SiC MESFETs
- 2006
-
In: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:7, s. 573-575
-
Journal article (peer-reviewed)abstract
- Silicon carbide (SiC) MESFETs were fabricated using a standard SiC MESFET structure with the application of the "buried-channel" and field-plate (FP) techniques in the process. FPs combined with a buried-gate are shown to be favorable concerning output power density and power-added efficiency (PAE), due to higher breakdown voltage and decreased output conductance. A very high power density of 7.8 W/mm was measured on-wafer at 3 GHz for a two-finger 400-/spl mu/m gate periphery SiC MESFET. The PAE for this device was 70% at class AB bias. Two-tone measurements at 3 GHz /spl plusmn/ 100 kHz indicate an optimum FP length for high linearity operation.
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| 25. |
- Andersson, Kristoffer, 1976, et al.
(author)
-
Resistive SiC-MESFET mixer
- 2002
-
In: IEEE Microwave and Wireless Components Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 1531-1309 .- 1558-1764. ; 12:4, s. 119-121
-
Journal article (peer-reviewed)abstract
- A single-ended silicon carbide resisitve MESFET mixer with minimum conversion loss (CL) of 10.2 dB and an input third order intercept point of 35.7 dB at 3.3 GHz was designed and characterized. A lumped-element, large-signal model was used for modeling the device. The drain-source resistance was measured by taking the real part of the output port impedence. Analysis suggested that the optimum gate bias for minimum CL was -6.7 V.
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| 26. |
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| 27. |
- Angelov, Iltcho, 1943, et al.
(author)
-
A balanced millimeter wave doubler based on pseudomorphic HEMTs
- 1992
-
In: 1992 IEEE MTT-S International Microwave Symposium Digest. - 0149-645X. ; 1, s. 353-356
-
Conference paper (peer-reviewed)abstract
- A balanced HEMT (high electron mobility transistor) doubler for operation at millimeter waves has been analyzed, fabricated, and characterized. Particular attention has been paid to the influence of the output circuit on the performance of the doubler. The doubler was analyzed with a harmonic balance method and an output power of 4 dBm at 42 GHz was obtained experimentally. The conversion gain is approximately -1 dB at 40 GHz at an input power of 5 dBm. Bias and frequency response were very close to the predicted ones.
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| 28. |
- Angelov, Iltcho, 1943, et al.
(author)
-
A new empirical nonlinear model for HEMT-devices
- 1992
-
In: 1992 IEEE MTT-S International Microwave Symposium Digest. - 0149-645X. - 0780306112 ; 3, s. 1583-1586
-
Conference paper (peer-reviewed)abstract
- A novel signal model for HEMTs (high-electron-mobility transistors) capable of modeling the current-voltage characteristic and its derivatives, including the characteristic transconductance peak and gate-source and gate-drain capacitances, is described. Model parameter extraction is straightforward and is performed for a submicron gate-length ∂-doped pseudomorphic HEMT. The model has been used to predict the DC- and S-parameters of the devices and different nonlinear circuits such as mixers and multipliers with very high accuracy.
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| 29. |
- Angelov, Iltcho, 1943, et al.
(author)
-
CMOS large signal model for CAD
- 2003
-
In: 2003 IEEE MTT-S International Microwave Symposium Digest. ; 2, s. 643-646
-
Conference paper (peer-reviewed)
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| 30. |
- Angelov, Iltcho, 1943, et al.
(author)
-
F-band resistive mixer based on heterostructure field effect transistor technology
- 1993
-
In: Proceedings of the 1993 IEEE MTT-S International Symposium on Circuits and Systems. - 0149-645X. - 0780312090 ; 2, s. 787-790
-
Conference paper (peer-reviewed)abstract
- A fundamentally pumped millimeter wave resistive mixer based on an HFET technology working at F-band (90-140 GHz) is described for the first time. Nonlinear simulations have been performed for this mixer based on an specially designed double δ-doped pseudomorphic HFET device developed for this application. A minimum conversion loss between 12 to 13 dB was measured with the RF fixed at different frequencies between 108 to 114 GHz at an RF power of -13 dBm. Both theoretical and experimental results are presented in this paper.
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| 31. |
- Angelov, Iltcho, 1943, et al.
(author)
-
Large-Signal Modelling and Comparison of AlGaN/GaN HEMTs and SiC MESFETs
- 2006
-
In: IEEE Asia PAcific Microwave Conference, 2006, Yokohama, Japan. - 9784902339116 ; , s. 279-282
-
Conference paper (peer-reviewed)abstract
- The Large Signal (LS) model for GaN and SiC FET devices was developed and evaluated with DC, S, and LS measurements. Special attention was paid to improve the management of harmonics and provide. a more physical treatment of the dispersion. The model was implemented in a commercial CAD tool and exhibit good overall accuracy.
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| 32. |
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| 33. |
- Bao, M., et al.
(author)
-
14 Gbps on-off keying modulator and demodulator for D-band communication
- 2014
-
In: 2014 IEEE International Wireless Symposium (IWS), 24-26 March 2014, X'ian. - 9781479934034 ; , s. (4 pp)-
-
Conference paper (peer-reviewed)abstract
- An on-off keying (OOK) modulator and demodulator operating at carrier frequency from 100 GHz to 150 GHz are designed and manufactured in a 0.25 μm InP DHBT Technology. The modulator is based on a switch controlled frequency quadrupler, which is driven by input data and a sinusoid signal source. A power detector consisting of a 4-way power divider and four identical active power detector units is proposed as an OOK demodulator. Combining the output of the detector units enables reducing of the ripple at the output by suppressing the 1st, the 2nd, and the 3rd harmonics due to the phase cancellation. The modulator and demodulator are characterized by on-wafer measurements. As an integrated OOK modulator and demodulator, high data rate transmission up to 14 Gbps is demonstrated. At data rate of 13 Gbps, BER
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| 34. |
- Bao, Mingquang, 1962, et al.
(author)
-
A 100-145 GHz Area-Efficient Power Amplifier in a 130 nm SiGe Technology
- 2017
-
In: European Microwave Integrated Circuits Conference - Proceedings. - 9782874870484 ; 2017-January, s. 277-280
-
Conference paper (peer-reviewed)abstract
- A 6-stage, 8-way combining power amplifier (PA) in a 130 nm SiGe BiCMOS technology is designed and measured. This PA has an output power of 12.5 - 15.5 dBm in a frequency range from 100 GHz to 145 GHz, when the input power is about 2 dBm. The small signal gain is 19 dB and the maximum DC power consumption is 480 mW with a supply voltage of 1.87 V. The peak power added efficiency (PAE) is 6.4% in D-band. T-junctions are utilized to combine and divide millimeter-wave power. To reduce the PA's loss and chip area, neither a Wilkinson power combiner/divider nor a balun is applied. The chip size is 0.53 mm(2) (0.26 mm(2) without pads).
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| 35. |
- Bao, Mingquan, et al.
(author)
-
A 135–183GHz Frequency Sixtupler in 250nm InP HBT
- 2020
-
In: IEEE MTT-S International Microwave Symposium Digest. - 0149-645X. ; 2020, s. 480-483
-
Conference paper (peer-reviewed)abstract
- A technique to design a broadband two-stage frequency tripler is proposed. The 1 st and the 2 nd harmonics obtained from the first stage are mixed in the second stage, getting the 3 rd harmonic. Between the two stages, there is a two-pole filter which lets the amplitude of the 1 st harmonic increase and the amplitude of the 2 nd harmonic decrease when the frequency increases. Consequently, a large 1 st harmonic is always mixed with a small 2 nd harmonic, and vice versa, which equalizes the amplitude of the mixing product, i.e., the 3 rd harmonic, over a large bandwidth. Together with a frequency doubler and a buffer amplifier, this frequency tripler is used in a frequency sixtupler. A proof-of-concept circuit is designed and implemented in 250 nm indium phosphide (InP) double-heterojunction bipolar transistor (DHBT) technology. For an input power of 6.3 dBm, the sixtupler has an output power between 0 dBm to 4.6 dBm in the output frequency range from 135 GHz to 183 GHz. It exhibits up to 13 dBc rejection ratio of the undesired 4 th , 5 th , and 7th harmonics. The sixtupler consumes a dc power of 100 mW, and achieves a peak power efficiency of 2.5%.
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| 36. |
- Bao, M., et al.
(author)
-
A 31~61 GHz linear transconductance up-conversion mixer with 15 GHz IF-bandwidth
- 2013
-
In: IEEE MTT-S International Microwave Symposium Digest. - 0149-645X.
-
Conference paper (peer-reviewed)abstract
- A novel 31-61 GHz up-conversion transconductance mixer is proposed, designed and manufactured in a 0.25 μm InP DHBT technology, which consists of a main and an auxiliary mixer. At large input power, the conversion gain compression of the main mixer is compensated by the gain expansion of the auxiliary mixer; consequently, the linearity of the combined two mixers is improved. The measured output referred 1-dB compression point, OP1dB, is -2.2 dBm to -0.57 dBm in the frequency range, which to the authors' knowledge, is the best obtained among the up-conversion mixers published so far. Moreover, the mixer also demonstrates a broad IF bandwidth of 0~15 GHz, supporting up-conversion of high datarate baseband signals. © 2013 IEEE.
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| 37. |
- Bao, Mingquang, 1962, et al.
(author)
-
A High-Speed Power Detector for D-Band Communication
- 2014
-
In: IEEE Transactions on Microwave Theory and Techniques. - 0018-9480 .- 1557-9670. ; 62:7, s. 1515-1524
-
Journal article (peer-reviewed)abstract
- A D-band power detector (PD) consisting of a four-way power divider and four identical active PD units is proposed, where four individual PD units are derived by the input signals having the same amplitude, but a 90 degrees phase difference. The outputs of the PD units are combined, to suppress the first, second, and third harmonics due to phase cancellation. Consequently, the ripple at the output is minimized. The proposed PD is designed and manufactured in a 0.25-mu m InP DHBT technology, which is characterized by on-chip measurements with both a sinusoidal signal and a binary amplitude shift-keying modulated signal at a data rate up to 13 Gb/s over different carrier frequencies from 100 to 150 GHz. Measured bit error rate for a 2(7) - 1 pseudorandom binary sequence is less than 10(-12) at the carrier frequency of 120 GHz, and less than 1.7 x 10(-5) at the carrier frequency of 150 GHz. In addition, the proposed PD achieves state-of-the-art power/energy efficiency, which exhibits the lowest energy per bit of 1.1 pJ/bit. Total dc power consumption of the PD is 15 mW.
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| 38. |
- Bao, M., et al.
(author)
-
A V-band high linearity two-stage subharmonically pumped mixer
- 2014
-
In: European Microwave Week 2014: "Connecting the Future", EuMW 2014 - Conference Proceedings; EuMIC 2014: 9th European Microwave Integrated Circuits Conference. - 9782874870361 ; , s. 162-165
-
Conference paper (peer-reviewed)abstract
- The 'gain expansion' of a subharmonically pumped mixer (SHM) is utilized for the first time, to compensate for the 'gain compression' of the cascaded amplifier. Consequently, a linear two-stage SHM is obtained. A proof-of-concept circuit is designed and manufactured in a 0.25 μm InP DHBT process, which down-converts a V-band RF signal to an IF signal, driven by a LO signal whose frequency is a half of that for a fundamental mixer (2×SHM). In RF range from 55 GHz to 67 GHz, the SHM has 6 to 9 dB conversion gain when LO power is 5 dBm. Simultaneously, it achieves a high third-order output intercept point (OIP3) from 10 dBm to 16 dBm. The measured input and output 1-dB compression points (P1dB and OP1dB) at RF frequency of 61 GHz are-2 dBm and 3 dBm, respectively. Obtained OP1dB and OIP3, to the best of authors' knowledge, is the best among the published 2×SHMs. Furthermore, this SHM is measured as the LO frequency is one-third (3×SHM) and a quarter (4×SHM) of that for a fundamental mixer, which has conversion gains of 3 dB and-1 dB, respectively.© 2014 European Microwave Association-EUMA.
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| 39. |
- Bao, M. Q., et al.
(author)
-
A 110-to-147 GHz Frequency Sixtupler in a 130 nm Sige Bicmos Technology
- 2018
-
In: EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference. ; , s. 105-108
-
Conference paper (peer-reviewed)abstract
- The presented D-band sixtupler consists of a frequency tripler, a frequency doubler, as well as amplifiers. The optimum arrangement for those blocks is investigated. The analysis shows that the tripler should precede the doubler. Furthermore, to extend the bandwidth, an amplifier with an increasing gain versus frequency is applied, to compensate the gain decrease of the tripler. This wideband frequency sixtupler is designed and characterized in a 130 nm SiGe BiCMOS technology. This sixtupler has a bandwidth of 37 GHz (from 110 to 147 GHz), the maximum output power is 4.5 dBm, with a DC power consumption of 310 mW. The maximum power efficiency is 0.9%.
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| 40. |
- Bao, M. Q., et al.
(author)
-
A D-Band Frequency Sixtupler MMIC With Very Low DC Power Consumption
- 2016
-
In: IEEE Microwave and Wireless Components Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 1558-1764 .- 1531-1309. ; 26:9, s. 726-728
-
Journal article (peer-reviewed)abstract
- A novel frequency sixtupler is proposed and verified experimentally. It consists of an even-order harmonics generating stage and a mixing stage to convert the 2nd and the 4th harmonics into the 6th harmonic. Transistors in those two stages operate in class-C condition, thus, the sixtupler consumes very low DC power. A proof-of-concept circuit is designed and manufactured in a 0.25 mu m InP DHBT Technology. The sixtupler delivers a maximum output power of -3.5 dBm at 121 GHz at an input power of 7 dBm. Its 3-dB bandwidth of the output power is 25 GHz in the frequency range from 100 GHz to 125 GHz. It demonstrates also more than 10 dBc rejection ratio of the unwanted harmonics in the frequency range from 110 to 125 GHz. The sixtupler consumes a DC power of only 20 mW, which to the authors knowledge, is the lowest among sixtuplers published so far. The sixtupler also achieves a state-of-the-art peak power efficiency of 1.9%.
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| 41. |
- Bao, M. Q., et al.
(author)
-
A D-Band Keyable High Efficiency Frequency Quadrupler
- 2014
-
In: IEEE Microwave and Wireless Components Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 1558-1764 .- 1531-1309. ; 24:11, s. 793-795
-
Journal article (peer-reviewed)abstract
- A D-band frequency quadrupler consisting of two cascaded push-push doublers is designed and manufactured in a 0.25 mu m InP DHBT technology. Each doubler has a Marchand balun implemented by broadside-coupled transmission lines, folded in a rectangular shape. The second balun, operating at a half of output frequency, is located inside of the first one for minimizing the chip size. The frequency quadrupler with a dc power consumption of 47 mW has a maximum conversion gain of 2 dB, and exhibits 12 to 25 dBc rejection ratio of the undesired first to fifth harmonics in the frequency range from 110 to 130 GHz. The quadrupler demonstrates a power efficiency of 10%, which is the highest among published quadruplers, as well as the highest conversion gain and an output power of 5 similar to 7 dBm without using power amplifiers. The chip size is 0.77 mm(2). By switching a cascode transistor, the quadrupler can also be used as an on-off keying modulator.
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| 42. |
- Bao, M. Q., et al.
(author)
-
A High Power-Efficiency D-Band Frequency Tripler MMIC With Gain Up to 7 dB
- 2014
-
In: IEEE Microwave and Wireless Components Letters. - 1558-1764 .- 1531-1309. ; 24:2, s. 123-125
-
Journal article (peer-reviewed)abstract
- A novel frequency tripler consisting of a harmonics generating stage and a converting stage is proposed. A common-emitter transistor in the first stage is used to produce mainly the first to third harmonics, while, a common-emitter transistor in the second stage converts simultaneously the first and the second harmonics into the third harmonic, and also amplifies the third harmonic at the input. The third harmonics obtained from different mechanisms add in favorably phase, and consequently improving the tripler's conversion gain. A proof-of-concept circuit is designed and manufactured in a 0.25 mu m InP DHBT Technology. The tripler has a conversion gain between 0 dB to 7 dB in the output frequency range from 110 to 155 GHz. It demonstrates also up to 30 dBc rejection ratio of the undesired first, the second and the fourth harmonics. The tripler consumes a dc power of only 45 mW, and achieves a state-of-the-art peak power efficiency of 20.2%, which to the authors' knowledge, is the highest obtained among triplers with positive gain published so far.
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| 43. |
- Bao, M. Q., et al.
(author)
-
G-band Power Amplifiers in 130 nm InP Technology
- 2021
-
In: EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference. ; , s. 85-88
-
Conference paper (peer-reviewed)abstract
- Two G-band three-stage power amplifiers (PA), a Darlington PA and a stacked PA, are designed and manufactured in 130 nm InP HBT Technology. The stacked PA shows a 70 GHz bandwidth of S21 (from 140 GHz to 210 GHz) with a peak S21 gain of 30 dB. It has a fractional bandwidth (FBW) of 40%. While the Darlington PA demonstrates a 90 GHz bandwidth of S21 (from 130 GHz to 220 GHz) with a peak S21 gain of 20 dB, the FBW of the Darlington PA is 51% which is highest among the G-band PAs. Furthermore, the Darlington PA has a saturated output power, Psat, of 9.6 dBm at 150 GHz, and a power added efficiency (PAE) of 14.7% with a 55 mW de power consumption. The stacked PA has a Psat of 13.4 dBm at 150 GHz, and a PAE of 17.3% with a 108 mW dc power consumption. To authors' knowledge, the stacked PA has the highest PAE among the D/G-band PAs published in the literature.
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| 44. |
- Beuerle, Bernhard, et al.
(author)
-
Integrating InP MMICs and Silicon Micromachined Waveguides for sub-THz Systems
- 2023
-
In: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 44:10, s. 1800-1803
-
Journal article (peer-reviewed)abstract
- A novel co-designed transition from InP monolithic microwave integrated circuits to silicon micromachined waveguides is presented. The transition couples a microstrip line to a substrate waveguide sitting on top of a vertical waveguide. The silicon part of the transition consists of a top and a bottom chip, fabricated in a very low-loss silicon micromachined waveguide technology using silicon on insulator wafers. The transition has been designed, fabricated and characterized for 220-330 GHz in a back-to-back configuration. Measured insertion loss is 3-6 dB at 250-300 GHz, and return loss is in excess of 5 dB.
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| 45. |
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| 46. |
- Campion, James, 1989-, et al.
(author)
-
Toward Industrial Exploitation of THz Frequencies : Integration of SiGe MMICs in Silicon-Micromachined Waveguide Systems
- 2019
-
In: IEEE Transactions on Terahertz Science and Technology. - : Institute of Electrical and Electronics Engineers (IEEE). - 2156-342X .- 2156-3446. ; 9:6, s. 624-636
-
Journal article (peer-reviewed)abstract
- A new integration concept for terahertz (THz) systems is presented in this article, wherein patterned silicon-on-insulator wafers form all DC, IF, and RF networks in a homogeneous medium, in contrast to existing solutions. Using this concept, silicon-micromachined waveguides are combined with silicon germanium (SiGe) monolithic microwave integrated circuits (MMICs) for the first time. All features of the integration platform lie in the waveguide’s H-plane. Heterogeneous integration of SiGe chips is achieved using a novel in-line H-plane transition. As an initial step toward complete systems, we outline the design, fabrication, and assembly of back-to-back transition structures, for use at D-band frequencies (110ï¿œ170 GHz). Special focus is given to the industrial compatibility of all components, fabrication, and assembly processes, with an eye on the future commercialization of THz systems. Prototype devices are assembled via two distinct processes, one of which utilizes semiautomated die-bonding tools. Positional and orientation tolerances for each process are quantified. An accuracy of $\pm \text3.5\; μ \textm$, $\pm \text1.5 °$ is achieved. Measured $S$-parameters for each device are presented. The insertion loss of a single-ended transition, largely due to MMIC substrate losses, is 4.2ï¿œ5.5 dB, with a bandwidth of 25 GHz (135ï¿œ160 GHz). Return loss is in excess of 5 dB. Measurements confirm the excellent repeatability of the fabrication and assembly processes and, thus, their suitability for use in high-volume applications. The proposed integration concept is highly scalable, permitting its usage far into the THz frequency spectrum. This article represents the first stage in the shift to highly compact, low-cost, volume-manufacturable THz waveguide systems.
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| 47. |
- Cao, Haiying, 1982, et al.
(author)
-
Compensation of Transmitter Distortion Using a Nonlinear Modeling Approach
- 2008
-
In: International Workshop on Integrated Nonlinear Microwave and Millimetre-wave Circuits 2008. - 9781424426461 ; , s. 131-134
-
Conference paper (peer-reviewed)abstract
- In this paper, a nonlinear modeling approach is used to demonstrate a joint compensation scheme for the linear and nonlinear distortions in the I/Q modulator and the power amplifier. Based on this nonlinear model, a digital pre-compensator is constructed. The effects of these two mostdominant nonlinear components in a modern transmitter cantherefore be digitally pre-compensated in a single step. The results are verified by experiments, and the proposed approach shows promising performance.
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| 48. |
- Cao, Haiying, 1982, et al.
(author)
-
Dual-Input Nonlinear Modeling for I/Q Modulator Distortion Compensation
- 2009
-
In: 2009 IEEE Radio and Wireless Symposium, RWS 2009; San Diego, CA; United States; 18 January 2008 through 22 January 2008. - 9781424426997 ; , s. 39-42
-
Conference paper (peer-reviewed)abstract
- This paper focuses on modeling and compensation of both linear and nonlinear distortions in RF I/Q modulators using a dual-input Volterra series-based modeling approach. Moreover, dual-input memory polynomial and dual-input dynamic deviation reduction-based Volterra series models are proposed. The proposed models are evaluated by digital pre-compensation of a high performance I/Q modulator with a wideband input signal. The results show that the proposed dual-input models efficiently compensate for distortion in the I/Q modulator and may therefore greatly improve performance in modern communication systems.
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| 49. |
- Cao, Haiying, 1982, et al.
(author)
-
I/Q Imbalance Compensation Using a Nonlinear Modeling Approach
- 2009
-
In: IEEE Transactions on Microwave Theory and Techniques. - 0018-9480 .- 1557-9670. ; 57:3, s. 513-518
-
Journal article (peer-reviewed)abstract
- In-phase/quadrature (I/Q) imbalance is one of the main sources of distortion in RF modulators. In this paper, a dual-input nonlinear model based on a real-valued Volterra series is proposed for compensation of the nonlinear frequency-dependent I/Q imbalance. First, different sources of distortion are identified from experimental measurements, then a dual-input nonlinear I/Q imbalance model is developed. Further, the inverse model is used for I/Q imbalance compensation. Finally, the performance of the I/Q imbalance compensator is evaluated with both simulations and experiments. In comparison with previously published results, the proposed I/Q imbalance compensator shows significantly improved performance. Thus, we prove that a complete nonlinear I/Q imbalance compensation can minimize the effects of the RF modulator in high-performance digital communication systems.
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| 50. |
- Cao, Haiying, 1982, et al.
(author)
-
Time Alignment in a Dynamic Load Modulation Transmitter Architecture
- 2009
-
In: Proceedings of the 39th European Microwave Conference, EuMC 2009, Sept. 29-Oct. 1 2009, Rome. - 9781424447480 ; , s. 1211 - 1214
-
Conference paper (peer-reviewed)abstract
- A time alignment algorithm is proposed for a dynamic load modulation transmitter architecture. The effect of time mismatch between the RF input and baseband control signal is investigated by experiments, and it is shown that unsynchronized signals can result in severe distortion of the output signal. In this paper, cross correlation and sinc interpolation techniques are applied to estimate and compensate for the sub-sample delay between the RF signal path and the baseband control signal path in the measurement system. The performance of the dynamic load modulation transmitter architecture with accurate time alignment is shown by experimental results. The measurement shows that, the efficiency is greatly affected by time alignment and the spectral regrowth is suppressed by more than 10 dB.
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