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1.	Landin, Per Niklas, 1983-, et al. (author) Modeling and Digital Predistortion of Class-D Outphasing RF Power Amplifiers 2012 In: IEEE transactions on microwave theory and techniques. - : Institute of Electrical and Electronics Engineers (IEEE). - 0018-9480 .- 1557-9670. ; 60:6, s. 1907-1915 Journal article (peer-reviewed)abstract This paper presents a direct model structure for describing class-D outphasing power amplifiers (PAs) and a method for digitally predistorting these amplifiers. The direct model structure is based on modeling differences in gain and delay, nonlinear interactions between the two paths, and differences in the amplifier behavior. The digital predistortion method is designed to operate only on the input signals phases, to correct for both amplitude and phase mismatches. This eliminates the need for additional voltage supplies to compensate for gain mismatch. less thanbrgreater than less thanbrgreater thanModel and predistortion performance are evaluated on a 32-dBm peak-output-power class-D outphasing PA in CMOS with on-chip transformers. The excitation signal is a 5-MHz downlink WCDMA signal with peak-to-average power ratio of 9.5 dB. Using the proposed digital predistorter, the 5-MHz adjacent channel leakage power ratio (ACLR) was improved by 13.5 dB, from -32.1 to -45.6 dBc. The 10-MHz ACLR was improved by 6.4 dB, from -44.3 to -50.7 dBc, making the amplifier pass the 3GPP ACLR requirements.

Landin, Per Niklas, 1983-, et al. (author)
Modeling and Digital Predistortion of Class-D Outphasing RF Power Amplifiers
2012
In: IEEE transactions on microwave theory and techniques. - : Institute of Electrical and Electronics Engineers (IEEE). - 0018-9480 .- 1557-9670. ; 60:6, s. 1907-1915
Journal article (peer-reviewed)abstract
- This paper presents a direct model structure for describing class-D outphasing power amplifiers (PAs) and a method for digitally predistorting these amplifiers. The direct model structure is based on modeling differences in gain and delay, nonlinear interactions between the two paths, and differences in the amplifier behavior. The digital predistortion method is designed to operate only on the input signals phases, to correct for both amplitude and phase mismatches. This eliminates the need for additional voltage supplies to compensate for gain mismatch. less thanbrgreater than less thanbrgreater thanModel and predistortion performance are evaluated on a 32-dBm peak-output-power class-D outphasing PA in CMOS with on-chip transformers. The excitation signal is a 5-MHz downlink WCDMA signal with peak-to-average power ratio of 9.5 dB. Using the proposed digital predistorter, the 5-MHz adjacent channel leakage power ratio (ACLR) was improved by 13.5 dB, from -32.1 to -45.6 dBc. The 10-MHz ACLR was improved by 6.4 dB, from -44.3 to -50.7 dBc, making the amplifier pass the 3GPP ACLR requirements.

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