| 1. |
- Börjeson, Erik, 1984, et al.
(author)
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Circuit Implementation of Pilot-Based Dynamic MIMO Equalization for Coupled-Core Fibers
- 2024
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In: Optical Fiber Communication Conference, OFC 2024. - 9781957171326
-
Conference paper (peer-reviewed)abstract
- We explore ASIC implementation for pilot-based MIMO equalizers for coupled-core transmission, considering chip area scaling trends and performance impact of time-dependent drift. For a system with 28-GBd subcarriers, an equalizer for 8 × 8 is 5.3 times larger than for 2 × 2.
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| 2. |
- Börjeson, Erik, 1984
(author)
-
Implementation and Evaluation of Signal Processing Circuits for Optical Communication
- 2024
-
Doctoral thesis (other academic/artistic)abstract
- The digital signal processing (DSP) circuits used in the fiber-optic communication links that make up the backbone of the Internet can be a significant contributor the over-all power dissipation of a link. As the number of connected users and their bandwidth requirements are expected to continue to grow over the coming years, the development of power-efficient high-throughput DSP systems is a critical factor in enabling this growth. Unfortunately, DSP designers can no longer depend on foundries delivering faster and more power-efficient circuits for each new process node, due to both economical and physical limitations. As a result, more stringent speed and power requirements are put on the circuit designs. Carrier phase recovery (CPR) is one subsystem of a typical DSP system for fiber-optic communication. In this thesis, we explore and evaluate circuit designs of multiple types of CPR, with a focus on single-mode systems. The circuit designs allow us to uncover trade-offs between power dissipation, area, throughput and signal degradation, for different types of systems employing a range of modulation formats. Coupled-core multi-mode fiber systems have been suggested as a way to increase throughput by utilizing also the spatial dimension, and this thesis describes a multiple-input multiple-output adaptive equalizer targeting these systems. The equalizer circuit enables exploration of how this critical subsystem scales to higher core counts. Additionally, we describe a circuit verification and evaluation environment that has the potential to speed up simulations by orders of magnitude by emulating a fiber-optic link onboard an application-specific integrated circuit or a field-programmable gate array.
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| 3. |
- Börjeson, Erik, 1984, et al.
(author)
-
Real-Time Implementation of Machine-Learning DSP
- 2024
-
In: 2024 Optical Fiber Communications Conference and Exhibition, OFC 2024 - Proceedings.
-
Conference paper (peer-reviewed)abstract
- While ML algorithms can learn and adapt to channel characteristics, implementation of ML-based DSP hardware is challenging. We demonstrate a real-time implementation of a model-based ML equalizer that compensates a non-linear and time-varying channel.
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| 4. |
- Mazur, Mikael, 1990, et al.
(author)
-
Real-Time Monitoring of Cable Break in a Live Network using a Coherent Transceiver Prototype
- 2024
-
In: Optical Fiber Communication Conference, OFC 2024. - 9781957171326
-
Conference paper (peer-reviewed)abstract
- We monitor a 524-km live network link using an real-time FPGA-based sensing-capable transceiver prototype during a human-caused cable break. Polarization sensing data shows minute-level potential break warning precursors, offering outage mitigation prospects.
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