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Träfflista för sökning "WFRF:(Ebrahimi M) srt2:(2009)"

Search: WFRF:(Ebrahimi M) > (2009)

  • Result 1-3 of 3
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1.
  • Ebrahimi, M., et al. (author)
  • An Efficient Dynamic Multicast Routing Protocol for Distributing Traffic in NOCs
  • 2009
  • In: 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09. ; , s. 1064-1069
  • Conference paper (peer-reviewed)abstract
    • Nowadays, in MPSoCs and NoCs, multicast protocol is significantly used for many parallel applications such as cache coherency in distributed shared-memory architectures, clock synchronization, replication, or barrier synchronization. Among several multicast schemes proposed in on chip interconnection networks, path-based multicast scheme has been proven to be more efficient than the tree-based, and unicast-based. In this paper a low distance path-based multicast scheme is proposed. The proposed method takes advantage of the network partitioning, and utilizing of an efficient destination ordering algorithm. The results in performance, and power consumption show that the proposed method outstands the previous on chip path-based multicasting algorithms.
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2.
  • Ebrahimi, M., et al. (author)
  • An Adaptive Unicast/Multicast Routing Algorithm for MPSoCs
  • 2009
  • In: PROCEEDINGS OF THE 2009 12TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN, ARCHITECTURES, METHODS AND TOOLS. ; , s. 203-206
  • Conference paper (peer-reviewed)abstract
    • Several parallel applications in MPSoCs take advantage of multicast communication. Path-based multicast scheme has been proven to be more efficient than the others multicast schemes in on-chip interconnection network. We present a new adaptive path based model for both the multicast and unicast wormhole routing protocols. The proposed model under mixed traffic models has lower latency than the previous path-based methods with negligible hardware overhead.
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3.
  • Ebrahimi, M., et al. (author)
  • Efficient network interface architecture for network-on-chips
  • 2009
  • In: 2009 NORCHIP. - 9781424443109
  • Conference paper (peer-reviewed)abstract
    • In this paper, we present novel network interface architecture for on-chip networks to increase memory parallelism and to improve the resource utilization. The proposed architecture exploits AXI transaction based protocol to be compatible with existing IP cores. Experimental results with synthetic test case demonstrate that the proposed architecture outperforms the conventional architecture in term of latency.
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  • Result 1-3 of 3
Type of publication
conference paper (3)
Type of content
peer-reviewed (3)
Author/Editor
Ebrahimi, M (3)
Tenhunen, Hannu (3)
Daneshtalab, M. (3)
Liljeberg, P. (2)
Mohammadi, S (1)
Plosila, J. (1)
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Neishaburi, M. H. (1)
Afzali-Kusha, A. (1)
Sreejesh, N. P. (1)
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University
Royal Institute of Technology (3)
Language
English (3)
Research subject (UKÄ/SCB)
Natural sciences (1)
Year
2009 (3)Undo refine

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