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- Lu, Zhonghai, et al.
(author)
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Flit admission in on-chip wormhole-switched networks with virtual channels
- 2004
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In: 2004 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS. - : IEEE conference proceedings. ; , s. 21-24
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Conference paper (peer-reviewed)abstract
- Flit-admission solutions for wormhole switches must minimize the complexity of the switches in order to achieve cheap implementations. We propose to couple flit-admission buffers with physical channels so that flits from a flit-admission buffer are dedicated to a physical channel. By the coupling strategy, for input-queuing wormhole lane switches, the complexity of the crossbars can be simplified from 2p x p to (p + 1) x p, where p is the number of physical channels; for output-queuing wormhole lane switches, the additional complexity is also minimal. We evaluate the flit-admission solutions derived from the coupling with uniformly distributed random traffic in a 2D mesh network. Experimental results show that these solutions exhibit good performance in terms of latency and throughput.
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- Lu, Zhonghai, et al.
(author)
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Flit ejection in on-chip wormhole-switched networks with virtual channels
- 2004
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In: 22ND NORCHIP CONFERENCE, PROCEEDINGS. - : IEEE conference proceedings. ; , s. 273-276
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Conference paper (peer-reviewed)abstract
- An ideal it-ejection model is typically assumed in the literature for wormhole switches with virtual channels. With such a model, its are ejected from the network immediately upon reaching their destinations. This achieves optimal performance but is very costly. The required number of sink queues of a switch for absorbing its is p center dot v, where p is the number of physical channels (PCs) of the switch; v the number of lanes per PC To achieve cheap silicon implementations, it-ejection solutions must be cost-effective. We present a novel it-ejection model and a variant of it where the required number of sink queues of a switch is p, i.e., independent of v. We evaluate the it-ejection models with uniformly distributed random traf c in a 2D mesh network. Experimental results show that they exhibit good performance in latency and throughput.
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- Sander, Ingo, et al.
(author)
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Development and application of design transformations in ForSyDe
- 2003
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In: IEE Proceedings - Computers and digital Techniques. - : Institution of Engineering and Technology (IET). - 1350-2387 .- 1359-7027. ; 150:5, s. 313-320
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Journal article (peer-reviewed)abstract
- The formal system design (ForSyDe) methodology has been developed for system level design. Starting with a formal specification model, which captures the functionality of the system at a high level of abstraction, it provides formal design transformation methods for a transparent refinement process of the specification model into an implementation model which is optimised for synthesis. The formal treatment of transformational design refinement is the central contribution of this article. Using the formal semantics of ForSyDe processes we introduce the term characteristic function to be able to define and classify transformations as either semantic preserving or design decision. We also illustrate how we can incorporate classical synthesis techniques that have traditionally been used with control/data-flow graphs as ForSyDe transformations. This approach avoids discontinuities as it moves design refinement into the domain of the specification model.
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