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- Bhadoria, Shubhangi, et al.
(author)
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Comparison of Top and Bottom Cooling for Short Duration of Over-Currents for SiC Devices: An Analysis of the Quantity and Location of Heat-Absorbing Materials
- 2024
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In: IEEE Open Journal of Power Electronics. - : Institute of Electrical and Electronics Engineers (IEEE). - 2644-1314. ; 5, s. 765-778
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Journal article (peer-reviewed)abstract
- The fault clearance time in the power system can vary from a few milliseconds to a few hundred milliseconds. Power electronics converters should be able to provide the increased current during faults without failing due to thermal limits. Hence, the heat generated in the semiconductor chip due to the over-current (OC) should be removed as soon as it is generated. In this paper, cooling by heat-absorbing material has been investigated on the top, bottom, and top + bottom of the SiC MOSFET chip using COMSOL simulations for OCs. The heat-absorbing materials considered in the paper are copper, graphite, and aluminum. The maximum allowed chip temperature is assumed to be 250 ˆC since SiC devices do not fail in this range of temperature. It is concluded that the cooling on the top of the chip has the best performance among the three arrangements discussed in the paper in terms of OC duration and steady-state temperature. Another conclusion is that copper has the best performance due to higher thermal capacity for the same volume of the heat-absorbing material.
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| 2. |
- Bhadoria, Shubhangi, et al.
(author)
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Over-Current Capability of Silicon Carbide and Silicon Devices for Short Power Pulses with Copper and Phase Change Materials below the Chip
- 2024
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In: Energies. - : MDPI. - 1996-1073. ; 17:2, s. 462-
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Journal article (peer-reviewed)abstract
- An increasing share of fluctuating and intermittent renewable energy sources can cause over-currents (OCs) in the power system. The heat generated during OCs increases the junction temperature of semiconductor devices and could even lead to thermal runaway if thermal limits are reached. In order to keep the junction temperature within the thermal limit of the semiconductor, the power module structure with heat-absorbing material below the chip is investigated through COMSOL Multiphysics simulations. The upper limits of the junction temperature for Silicon (Si) and Silicon Carbide (SiC) are assumed to be 175 and 250 ∘∘C, respectively. The heat-absorbing materials considered for analysis are a copper block and a copper block with phase change materials (PCMs). Two times, three times, and four times of OCs would be discussed for durations of a few hundred milliseconds and seconds. This article also discusses the thermal performance of a copper block and a copper block with PCMs. PCMs used for Si and SiC are LM108 and Lithium, respectively. It is concluded that the copper block just below the semiconductor chip would enable OC capability in Si and SiC devices and would be more convenient to manufacture as compared to the copper block with PCM.
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| 3. |
- Bhadoria, Shubhangi, et al.
(author)
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Testing of SiC MOSFETs for short over-current pulses of 1 ms
- 2024
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In: Proceedings CIPS 2024 - 13th International Conference on Integrated Power Electronics Systems. - : Institute of Electrical and Electronics Engineers (IEEE).
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Conference paper (pop. science, debate, etc.)abstract
- Over-currents (OCs) in the power system could be caused by fluctuations in the load, bus voltage, etc. In this article,TO-247 MOSFETs have been stressed for over-currents with a pulse duration of approximately 1 ms for two times OCs(2 OCs) to five times OCs (5 OCs). The junction temperature has been estimated and the failure modes are discussed. Ithas been observed that the devices do not show degraded behavior (change in on-state resistance and threshold voltage)for 100 cycles until 4.5 OCs. The devices failed anywhere between the first cycle to seven cycles for 4.8 OC and thedevices always failed in the first cycle for 5 OCs. This observation gives an estimation of the limit of stressing the devicesfor short pulses of a few milliseconds.
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