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Träfflista för sökning "WFRF:(Gottlob H. D. B.) srt2:(2009)"

Search: WFRF:(Gottlob H. D. B.) > (2009)

  • Result 1-7 of 7
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1.
  • Lemme, Max C., 1970-, et al. (author)
  • Complementary metal oxide semiconductor integration of epitaxial Gd(2)O(3)
  • 2009
  • In: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567. ; 27:1, s. 258-261
  • Journal article (peer-reviewed)abstract
    • In this paper, epitaxial gadolinium oxide (Gd(2)O(3)) is reviewed as a potential high-K gate dielectric, both "as deposited" by molecular beam epitaxy as well as after integration into complementary metal oxide semiconductor (CMOS) processes. The material shows promising intrinsic properties, meeting critical ITRS targets for leakage current densities even at subnanometer equivalent oxide thicknesses. These epitaxial oxides can be integrated into a CMOS platform by a "gentle" replacement gate process. While high temperature processing potentially degrades the material, a route toward thermally stable epitaxial Gd(2)O(3) gate dielectrics is explored by carefully controlling the annealing conditions.
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2.
  • Gottlob, H. D. B., et al. (author)
  • Gd silicate : A high-k dielectric compatible with high temperature annealing
  • 2009
  • In: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567 .- 2166-2754 .- 2166-2746. ; 27:1, s. 249-252
  • Journal article (peer-reviewed)abstract
    • The authors report on the investigation of amorphous Gd-based silicates as high-k dielectrics. Two different stacks of amorphous gadolinium oxide (Gd(2)O(3)) and silicon oxide (SiO(2)) on silicon substrates are compared after annealing at temperatures up to 1000 degrees C. Subsequently formed metal oxide semiconductor capacitors show a significant reduction in the capacitance equivalent thicknesses after annealing. Transmission electron microscopy, medium energy ion scattering, and x-ray diffraction analysis reveal distinct structural changes such as consumption of the SiO(2) layer and formation of amorphous Gd silicate. The controlled formation of Gd silicates in this work indicates a route toward high-k dielectrics compatible with conventional, gate first complementary metal-oxide semiconductor integration schemes.
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3.
  • Gottlob, H. D. B., et al. (author)
  • Scaling potential and MOSFET integration of thermally stable Gd silicate dielectrics
  • 2009
  • In: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 86:7-9, s. 1642-1645
  • Journal article (peer-reviewed)abstract
    • We investigate the potential of gadolinium silicate (GdSiO) as a thermally stable high-k gate dielectric in a gate first integration scheme. There silicon diffuses into gadolinium oxide (Gd2O3) from a silicon oxide (SiO2) interlayer specifically prepared for this purpose. We report on the scaling potential based on detailed material analysis. Gate leakage current densities and EOT values are compatible with an ITRS requirement for low stand by power (LSTP). The applicability of this GdSiO process is demonstrated by fully functional silicon on insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs). (C) 2009 Elsevier B.V. All rights reserved.
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4.
  • Schmidt, M., et al. (author)
  • Mobility extraction in SOI MOSFETs with sub 1 nm body thickness
  • 2009
  • In: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 53:12, s. 1246-1251
  • Journal article (peer-reviewed)abstract
    • In this work we discuss limitations of the split-CV method when it is used for extracting carrier mobilities in devices with thin silicon channels like FinFETs, ultra thin body silicon-on-insulator (UTB-SOI) transistors and nanowire MOSFETs. We show that the high series resistance may cause frequency dispersion during the split-CV measurements, which leads to underestimating the inversion charge density and hence overestimating mobility. We demonstrate this effect by comparing UTB-SOI transistors with both recessed-gate UTB-SOI devices and thicker conventional SOI MOSFETs. In addition, the intrinsic high series access resistance in UTB-SOI MOSFETs can potentially lead to an overestimation of the effective internal source/drain voltage, which in turn results in a severe underestimation of the carrier mobility. A specific MOSFET test structure that includes additional 4-point probe channel contacts is demonstrated to circumvent this problem, Finally, we accurately extract mobility in UTB-SOI transistors down to 0.9 nm silicon film thickness (four atomic layers) by utilizing the 4-point probe method and carefully choosing adequate frequencies for the split-CV measurements. It is found that in Such thin silicon film thicknesses quantum mechanical effects shift the threshold voltage and degrade mobility.
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5.
  • Schmidt, M., et al. (author)
  • Mobility Extraction of UTB n-MOSFETs down to 0.9 nm SOI thickness
  • 2009
  • In: ULIS 2009. - NEW YORK : IEEE. ; , s. 27-30
  • Conference paper (peer-reviewed)abstract
    • In this abstract, the impact of series resistance on mobility extraction in conventional and recessed-gate ultra thin body (UTB) n-MOSFETs is investigated. High series resistance leads to an overestimation of the internal source / drain voltage and influences the measurement of the gate to channel capacitance. A specific MOSFET design that includes additional channel contacts and recessed gate technology are used to successfully extract mobility down to 0.9 nm silicon film thickness (4 atomic layers). Quantum mechanical effects are found to shift the threshold voltage and degrade mobility at these extreme scaling limits.
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7.
  • Lu, Y., et al. (author)
  • Leakage current effects on C-V plots of high-k metal-oxide-semiconductor capacitors
  • 2009
  • In: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567 .- 2166-2754 .- 2166-2746. ; 27:1, s. 352-355
  • Journal article (peer-reviewed)abstract
    • With the employment of ultrathin, high dielectric constant gate materials in advanced semiconductor technology, the conventional capacitance-voltage measurement technique exhibits a series of anomalies. In particular, a nonsaturating increase in the accumulation capacitance with reducing measurement frequency is frequently observed, which has not been adequately explained to our knowledge. In this article, the authors provide an explanation for this anomaly and hence set a criterion for the lower bound on measurement frequency. We then present a model which allows the easy extraction of the required parameters and apply it to an experimental set of data.
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  • Result 1-7 of 7

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