1. |
- Andersson, Cristina, 1969, et al.
(author)
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Characterization of Mechanical Properties of Eutectic Sn-Co-Cu Lead Free Alloy
- 2006
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In: Proceedings of the 1st IEEE CPMT Electronics Systemintegration Technology Conference (ESTC2006), September 5-7, 2006, Dresden, Germany. - 9781424405527 ; 1, s. 152-160
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Conference paper (peer-reviewed)abstract
- The Sn-Co-Cu eutectic solder alloy is a less expensive and is therefore a possible alternative to the Sn-Ag-Cu alloys. The Sn-Co-Cu system eutectic composition was obtained by means of CALPHAD (CALculation of PHAse Diagram) methodology. The composition of the Sn-rich, eutectic Sn-Co-Cu system was found to be 0.4%Co and 0.7%Cu (wt%) with a melting point of 224°C. The tensile behavior of the eutectic Sn-0.4Co-0.7Cu bulk samples was studied under three different conditions of strain rates (10 -6 , 10 -4 and 10 -3 /s) and compared to both Sn-37Pb and Sn-4.0Ag-0.5Cu alloys. The evaluation of the tensile results showed that the effect of strain rate played an important roll on the tensile properties of these alloys, and it is clearly observed that the tensile strength increases as the strain rate increases. Furthermore, Sn-4.0Ag-0.5Cu alloy shows better Ultimate Tensile Strength (UTS) followed by Sn-37P and Sn-0.4Co-0.7Cu system. © 2006 IEEE.
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3. |
- Chen, Liu, 1973, et al.
(author)
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Reliability Investigation for Encapsulated Isotropic Conductive Adhesives Flip Chip Interconnection
- 2006
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In: Journal of Electronic Packaging, Transactions of the ASME. - : ASME International. - 1528-9044 .- 1043-7398. ; 128:3, s. 177-183
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Journal article (peer-reviewed)abstract
- Isotropic conductive adhesives (ICA) are gaining more and more application interests in electronic manufacturing, however, their failure mechanism is not been fully understood. In this paper we present reliability investigations on an encapsulated ICA flip chip interconnection. Experimental work included product lifetime measurement, cross section observation, and whole module warpage scanning. Results revealed that the chip-size effect on the ICA lifetime was obvious. A theoretical analysis was conducted with Finite Element Method (FEM) simulation. Viscoelastic models for adhesives and underfill materials were employed, and the comparison with an elastic model was made. Calculated equivalent stresses S eqv and shear stress σ xy fitted well with the experimental lifetime measurement, thus a lifetime relationship similar to the Coffin-Manson formula was established to predict the thermal fatigue life of an encapsulated ICA flip chip. Furthermore, the influences of underfill properties on the ICA reliability were discussed. Copyright © 2006 by ASME.
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7. |
- Liu, Johan, 1960, et al.
(author)
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Stem Cell Growth and Migration on Nanofibrous Polymer Scaffolds and Micro-Fluidic Channels on Silicon-Chip
- 2009
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In: Proceedings of the 2009 Electronic Components and Technology Conference. - 0569-5503. - 9781424444762 ; , s. 1080-1085
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Conference paper (peer-reviewed)abstract
- Stem cell growth and migration on nanofibrous scaffolds and micro-fluidic channels on Silicon-Chip were studied by using neural stem cells isolated from adult rats' brain. Electrospinning and lithographic technique were used for developing nanofibrous-polylactic acid (PLA) and polyurethane (PU) based-scaffolds and micro-fluidic channels on Si-Chips respectively. Immunocytochemical and morphological analysis showed better cell-matrix interaction with profound adhesion, proliferation and migration on the developed scaffolds. Cell culture assay with microfluidic channel revealed the ability of developed channel system in guiding neuronal stem cell growth towards specified directions. These studies extend the possibility of using developed nanofibrous scaffolds and micro-fluidic channel system for future electrical signal transmission based on living neural stem cells.
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11. |
- Wang, Teng, 1983, et al.
(author)
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Development of Carbon Nanotube Bumps for Ultra Fine Pitch Flip Chip Interconnection
- 2006
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In: 1st Electronics Systemintegration Technology Conference; Dresden, Saxony; Germany; 5 September 2006 through 7 September 2006. - 9781424405527 ; 2, s. 892-895
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Conference paper (peer-reviewed)abstract
- Since 1991, carbon nanotubes have been considered for successful applications in various fields due to their unique properties. In the present work, carbon nanotubes are applied in integrated circuit packaging, as the bump interconnection for flip chip. The reason for choosing carbon nanotubes as the bump material is their special electrical, mechanical and thermal properties, which may promote both the performance and reliability of the flip chip packaging. Moreover, carbon nanotubes can be formed according to a precisely predefined small-scale pattern, which makes extremely high density interconnection possible. Vertically aligned carbon nanotubes are grown on silicon in the form of square arrays of different sizes, heights and pitches. Attempts to use thermal compression and anisotropic conductive adhesive to bond chips carrying carbon nanotube bumps with ceramic substrates are also executed. Mechanical testing is performed afterward to determine the strength of the bonding interfaces. The strength of the bonding by thermal compression is very weak, in the range from 1.9 to 7.0 g/mm2. The bonding by anisotropic conductive adhesive is much stronger, indicating a possible approach to bond chips carrying carbon nanotube bumps.
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12. |
- Wang, Teng, 1983, et al.
(author)
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Low temperature transfer and formation of carbon nanotube arrays by imprinted conductive adhesive
- 2007
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In: Applied Physics Letters. - : AIP Publishing. - 0003-6951 .- 1077-3118. ; 91:9
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Journal article (peer-reviewed)abstract
- This letter demonstrates the transfer and formation of aligned carbon nanotube (CNT) arrays at low temperature by imprinted conductive adhesive. A thermoplastic isotropic conductive adhesive is patterned by an imprint and heat transfer process. The CNTs grown by thermal chemical vapor deposition are then transferred to another substrate by the conductive adhesive, forming predefined patterns. The current-voltage response of the transferred CNT bundles verifies that good electrical connection has been established. This process can enable the integration of CNTs into various temperature-sensitive processeses and materials.
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13. |
- Wang, Teng, 1983, et al.
(author)
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Through silicon vias filled with planarized carbon nanotube bundles
- 2009
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In: Nanotechnology. - : IOP Publishing. - 0957-4484 .- 1361-6528. ; 20:48
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Journal article (peer-reviewed)abstract
- The feasibility of using carbon nanotube (CNT) bundles as the fillers of through silicon vias (TSVs) has been demonstrated. CNT bundles are synthesized directly inside TSVs by thermal chemical vapor deposition (TCVD). The growth of CNTs in vias is found to be highly dependent on the geometric dimensions and arrangement patterns of the vias at atmospheric pressure. The CNT-Si structure is planarized by a combined lapping and polishing process to achieve both a high removal rate and a fine surface finish. Electrical tests of the CNT TSVs have been performed and their electrical resistance was found to be in the few hundred ohms range. The reasons for the high electrical resistance have been discussed and possible methods to decrease the electrical resistance have been proposed.
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15. |
- Zhang, Yan, 1976, et al.
(author)
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Experimental and Modeling of the Stress-Strain Behavior of a BGA Interconnect Due to Thermal Load
- 2008
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In: Journal of Electronic Packaging, Transactions of the ASME. - : ASME International. - 1528-9044 .- 1043-7398. ; 130:2, s. 0210101-0210107
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Journal article (peer-reviewed)abstract
- A plastic ball grid array component interconnect has been experimentally investigated and modeled on the basis of micropolar theory. The experimental results were analyzed, and the data also provided the verification for the micropolar interface model. Two different interconnect cross sections, namely, one near the component boundary and the other in the center region beneath the chip, have been measured. The effects of thermal cycling on the interconnect deformation have been considered. The deformation fields, due to the mismatch of the material properties of the constituents in the assembly system, have been observed by means of a multifunction macro-micro-moiré interferometer, whereby the displacement distributions have been obtained and analyzed for the different specimens. The interconnect layer is usually of smaller size as compared to the neighboring component, and there are even finer internal structures included in the interconnect. The scale difference makes conventional methods time consuming and of low efficiency. An interface model based on the micropolar theory has been developed, cf. Zhang, Y., and Larsson, R., 2007, "Interface Modelling of ACA Flip-Chip Interconnects Using Micropolar Theory and Discontinuous Approximation," Comput. Struct., 85, pp. 1500-1513, Larsson, R., and Zhang, Y., 2007, "Homogenization of Microsystem Interconnects Based on Micropolar Theory and Discontinuous Kinematics, " J. Mech. Phys. Solids, 55, pp. 819-841, aiming at predicting the interconnect behavior under thermal load, especially when there exist internal structures in the interface and the component/ structure sizes vary in a wide range. Numerical simulations, using the micropolar interface model, show a fairly good agreement between the experimental data and the numerical simulations.
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16. |
- Zhang, Yan, 1976, et al.
(author)
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Experimental investigation and micropolar modelling of the anisotropic conductive adhesive flip-chip interconnection
- 2008
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In: Electrically Conductive Adhesives. - 9789004187825 ; 22:14, s. 1717-1731
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Book chapter (other academic/artistic)abstract
- A conductive adhesive is a promising interconnection material for microsystem packaging. The interconnect features are of great importance to system responses under various loading conditions. The flip-chip packaging system with anisotropic conductive film (ACF) joint under thermal loadings has been investigated both experimentally and theoretically. The displacement distributions have been measured by an interferometer, which could provide the in-plane whole-field deformation observation. The interconnection is of much smaller scales compared with the neighbouring components such as the chip and substrate, and there are even finer internal structures involved in the joint. The wide scale range makes both experimental observation and conventional simulation difficult. A micropolar model is thus developed. Utilizing the homogenization, this model requires low computation resource. Combination of this model with a secondorder model was able to produce a highly efficient and valid prediction of the packaging system response under thermal and mechanical loadings. Comparison of the micropolar model simulation and experimental data shows good agreement.
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17. |
- Zhang, Yan, 1976, et al.
(author)
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Homogenization Model Based on Micropolar Theory for the Interconnection Layer in Microsystem Packaging
- 2006
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In: Proceedings of the eight IEEE CPMT International Symposium on High Density Packaging and Component Failure Anlaysis (HDP´06). - 1424404886 ; , s. 166-170
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Conference paper (peer-reviewed)abstract
- The increase in microsystem packaging density sets the requiement for component sizes in the system to become smaller and smaller. The scale decrease makes the analysis more complicated as the corresponding resolution should be improved to a great extent. Interconnection in the system is a typical interface structure that widely appear in the packaing system, in which periodic microstructures may be included inside. A homogenization model is developed in this paper, which focuses on the interface behavior. The interface model based on micropolar theory provides a natural way to include the characteristic scale that can reflect the size effect of the considered structure. Computations are carried out as the numerical example of the model, and comparisons of this model with those of the convertional method show its validity and efficiency.
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18. |
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19. |
- Zhang, Yan, 1976, et al.
(author)
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Interface Modelling of ACA Interconnects Using Micropolar Theory
- 2006
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In: 2005 Conference on High Density Microsystem Design and Packaging and Component Failure Analysis, HDP'05; Shanghai; China; 27 June 2005 through 29 June 2005. - 9780780392939 ; , s. Art. no. 4017426-
-
Conference paper (peer-reviewed)abstract
- The contribution focuses on applying micro-polar theory which, as compared to the classical continuum theory, can offer the possiblity to include e.g. a micro-structural size-effect for the simulation and prediction of the interfacial stresses of microsystem interconnections, such as anisotropically conductive adhesives. As the dimension of the adhesive is much smaller than the chip or the substrate, it is treated as an interface zone with a finite thickness. The micro-polar theory is used in the vicinity of the interface to model the transfer of the couple stress across the interface, and a degenerated micro-polar continuum to model the interface, across which a displacement and a rotational jump is regularized. The paper is concluded by a numerical example involving the FE-representation of the interface formulation.
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27. |
- Zhou, Hua, et al.
(author)
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Design for Embedded Chinese Display Smart Card
- 2006
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In: 2006 Conference on High Density Microsystem Design and Packaging and Component Failure Analysis, HDP'06; Shanghai; China; 27 June 2006 through 28 June 2006. - 9781424404889 ; , s. 152-156
-
Conference paper (peer-reviewed)abstract
- The storage and display of Chinese character data and the battery life are two bottle-necks of a Chinese display smart card which is one kind of super smart cards. This paper presented a new idea to realize the Chinese display which was a practice of embedded font solution. A dieform regular MCU, a smart card MCU and a graphical LCD controller(LCD driver) provided the main functions of the system to show Chinese characters on a graphical LCD panel, to receive operations from users and to run monitor program or, moreover, COS (Card Operating System). 2-Wire serial interface (TWI) was selected to be the communication protocol between the main MCU and the LCD controller in order to reduce the connection numbers and to enhance reliability. To minimize power consumption is one main design target for extending battery life. Besides selecting components with low power consumption, a power control scheme was designed to meet this requirement. A functional demonstrator was assembled in order to check the system desigh and to do the debug work.
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32. |
- Andersson, Cristina, 1969, et al.
(author)
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Effect of different temperature cycle profiles on the crack propagation and microstructural evolution of Sn-3.8Ag-0.7Cu solder joints
- 2005
-
In: 15th European Microelectronics and Packaging Conference and Exhibition, EMPC 2005 - Conference Programme and Proceedings. ; 2005, s. 523-528
-
Conference paper (peer-reviewed)abstract
- Temperature cycling of real electronic components was carried out in a systematic manner at two different temperature profiles and in a single-chamber Heraeus climate cabinet. The first temperature profile ranged between -55°C and 100°C and the second between 0°C and 100°C. Top-side SMD components (chip resistors and Ball Grid Arrays (BGA)) were soldered with Sn-3.8Ag-0.7Cu lead free solder paste. Crack initiation and propagation was analyzed after every 500 cycles for each temperature cycling profile. Totally, 6500 cycles were run at both temperature profiles. Finite element modeling (FEM) calculations, for the analysis of strain and stress of 1206 chip joints were used to corroborate the experimental work results, especially regarding the crack initiation sites. Cracks were firstly visible for the temperature cycling ranging between -55°C and 100°C. The cracks observed were also visibly smaller for the temperature profile ranging between 0°C and 100°C, concluding that crack initiation and propagation was slightly slower for this temperature profile. Cracks continued to propagate as a function of temperature cycles. The reason for this difference in crack initiation and propagation was also analyzed.
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33. |
- Andersson, Cristina, 1969, et al.
(author)
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Effect of different temperature cycling profiles on the crack initiation and propagation and of Sn-3.5Ag wave soldered joints
- 2007
-
In: Microelectronics and Reliability. - : Elsevier BV. - 0026-2714. ; 47:2-3, s. 266-272
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Journal article (peer-reviewed)abstract
- Temperature cycling of a test board with different electronic components was carried out at two different temperature profiles in a single-chamber climate cabinet. The first temperature profile ranged between 55 and 100 C and the second between 0 and 100 C. Hole mounted components and secondary side SMD components were wave soldered with an Sn–3.5Ag alloy. Joints of both dual in line(DIL) packages and ceramic chip capacitors were investigated. Crack initiation and propagation was analysed after every 500 cycles.In total, 6500 cycles were run at both temperature profiles and the observations from each profile were compared.For both kinds of components analysed, cracks were first visible for the temperature profile ranging between 55 and 100 C. For this temperature profile, and for DIL packages, cracks were visible already after 500 cycles, whereas for the other temperature profile, cracks initiated between 1000 and 1500 cycles. The cracks observed after 1500 cycles were visibly smaller for the temperature profile ranging between 0 and 100 C, concluding that crack initiation and propagation was slightly slower for this temperature profile. For the chip capacitors, cracks were first visible after 2000 cycles.
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34. |
- Andersson, Cristina, 1969, et al.
(author)
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Low Cycle Fatigue Behavior of Sn-4.0Ag-0.5Cu Lead-free in Corrosive Environmental Conditions
- 2006
-
In: ESTC 2006 - 1st Electronics Systemintegration Technology Conference; Dresden, Saxony; Germany; 5 September 2006 through 7 September 2006. - 9781424405527 ; 1, s. 457-467
-
Conference paper (peer-reviewed)abstract
- Isothermal low cycle fatigue experiments of lead free Sn-Ag-Cu solder joints were executed in different corrosive environmental conditions. The environments/factors varied were temperature, humidity and salt application on to the solder joints. The experiments were executed according to a full factorial design of experiments where the three different factors and two levels for each factor were varied according to literature. The outcome of the design of experiments was the number of cycles to failure defined as 50% load drop. The main goal with this work was to analyze the fatigue behavior of this solder material as a function of the different corrosive environments, and simultaneously to analyze its corrosion behavior/resistance. The factor with the highest effect on the fatigue life was salt application followed by temperature. The factor humidity was not significant for the tests performed.
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37. |
- Andersson, Cristina, 1969, et al.
(author)
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Tensile properties and microstructural characterization of Sn-0.7Cu-0.4Co bulk solder alloy for electronics applications
- 2008
-
In: Journal of Alloys and Compounds. - : Elsevier BV. - 0925-8388. ; 457:1/2, s. 97-105
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Journal article (peer-reviewed)abstract
- The ternary Sn–Cu–Co system eutectic composition was obtained by means of CALPHAD (CALculation of PHAse Diagram) methodology and it was found to be 0.4% Co and 0.7% Cu (wt%) with a melting point of 224 ◦C. The tensile behavior of this alloy was investigated at different strain rates (10−5, 10−4 and 10−3 s−1) and compared to both Sn–37Pb and Sn–4.0Ag–0.5Cu. The Sn–4.0Ag–0.5Cu alloy depicts the highest ultimate tensile strength (UTS) followed by the Sn–37P and finally the Sn–0.7Cu–0.4Co system. The elastic modulus was also higher for the Sn–4.0Ag–0.5Cu followed by the Sn–0.7Cu–0.4Co and last the Sn–37Pb. The microstructure of the Sn–0.7Cu–0.4Co alloy is composed of two types of intermetallic phases, (Cu,Co)6Sn5 and (Co,Cu)Sn2 dispersed in a Sn-rich matrix. The microstructure of this alloy proved to be very stable, after aging at 150 °C for 24 h. The eutectic Sn–0.7Cu–0.4Co solder alloy can therefore be a very good alternative for theSACalloys for surface mount technology applications.
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38. |
- Andersson, Cristina, 1969, et al.
(author)
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Thermal cycling aging effect on the shear strength, microstructure, IMC and initiation and propagation of surface mounted Sn-3.8Ag-0.7Cu and wave soldered Sn-3.5Ag ceramic chip components
- 2008
-
In: IEEE Transactions on Components and Packaging Technologies. - 1521-3331. ; 31:2, s. 331-344
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Journal article (peer-reviewed)abstract
- Temperature cycling of electronic components was carried out at two different temperature profiles, the first ranging between -55°C and 100°C (TC1) and the second between 0°C and 100°C (TC2). Totally, 7000 cycles were run at TC1 and 14500 cycles at TC2. The test board’s top-side components were surface mounted using Sn-3.8Ag-0.7Cu solder alloy, and bottom side SMD components were wave soldered with Sn-3.5Ag alloy. The solder joint degradation was investigated as a function of cycle number by means of shear strength measurements and cross-sectioning. The shear strength drop was correlated to both crack initiation time and propagation rate, and Microstructural changes. The effect of manufacturing process (reflow versus wave soldering) and component size (0805 versus 0603 components) on the shear strength were also investigated.For both reflow and wave soldered components, the harsher the test environment the faster and largest the decrease in shear strength. The shear force is higher for the 0805 components compared to the 0603. The effect of component size on the residual shear strength is higher for the testing condition TC1. TC1 also seems to have a higher effect on the residual shear strength compared to TC2. The main difference between wave soldered and reflow soldered components is that the shear strength is in average higher for the wave soldered components compared to the reflow soldered. For the reflow soldered components using SAC, the microstructure coarsens, especially the Ag3Sn intermetallic particles. Furthermore, this alloy shows an increase of the IMC layer (Cu-Ni-Sn) thickness, and the IMC layer growth is controlled by a diffusion mechanism. The IMC growth coefficient is for the SAC system tested at TC1 0.0231 μm/hr1/2 (0.00053μm/hr) and for TC2 0.0054 μm/hr1/2 (2.9*10-5μm/hr). The microstructural changes during thermal cycling are a result of both static and strain-enhanced aging. For the wave soldered components the microstructure also became coarser, however, the IMC layer (Ni3Sn4) thickness did not change.The IMC layer growth does not affect the shear strength for the test conditions applied in this work. The shear strength decrease observed in the present work as a result of thermal cycling is a result of both microstructural coarsening and crack propagation inside the solder joint.
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39. |
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40. |
- Andersson, Cristina, 1969, et al.
(author)
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Thermal cycling of lead-free Sn-3.8Ag-0.7Cu 388PBGA packages
- 2009
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In: Soldering and Surface Mount Technology. - : Emerald. - 1758-6836 .- 0954-0911. ; 21:2, s. 28-38
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Journal article (peer-reviewed)abstract
- Purpose - The purpose of this paper is to assess the effect of different temperature cycling profiles on the reliability of lead-free 388 plastic ball grid array (PBGA) packages and to deeply understand crack initiation and propagation.Design/methodology/approach - Temperature cycling of Sn-3.8Ag-0.7Cu PBGA packages was carried out at two temperature profiles, the first ranging between - 55 degrees C and 100 degrees C (TC1) and the second between 0 degrees C and 100 degrees C (TC2). Crack initiation and propagation was analyzed periodically and totally 7,000 cycles were run for TO and 14,500 for TC2. Finite element modeling (FEM), for the analysis of strain and stress, was used to corroborate the experimental results.Findings - The paper finds that TC1 had a characteristic life of 5,415 cycles and TC2 of 14,094 cycles, resulting in an acceleration factor of 2.6 between both profiles. Cracks were first visible for TC1, after 2,500 cycles, and only after 4,000 cycles for TC2. The crack propagation rate was faster for TC1 compared to TC2, and faster at the package side compared to the substrate side. The difference in crack propagation rate between the package side and substrate side was much larger for TC1 compared to TC2. Cracks developed first at the package side, and were also larger compared to the substrate side. The Cu tracks on the substrate side affected the crack propagation sites and behaved as SMD. All cracks propagated through the solder and crack propagation was mainly intergranular. Crack propagation was very random and did not follow the distance to neutral point (DNP) theory. FEM corroborated the experimental results, showing both the same critical location of highest creep strain and the independence of DNP.Originality/value - Such extensive work on the reliability assessment of Pb-free 388 PBGA packages has never been performed. This work also corroborates the results from other studies showing the difference in behavior between Pb-free and Pb-containing alloys.
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41. |
- Andrae, Anders, 1973, et al.
(author)
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Application of Simplified Methods for Partial Environmental Assessment of Microelectronics Soldering Materials and Processes in Small and Medium Sized Enterprises
- 2005
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In: International Journal of Life Cycle Assessment. ; 10:5
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Journal article (peer-reviewed)abstract
- As a consequence of the environmental regulations becoming stricter for companies within the microelectronics business area, alternative materials and processes with lower environmental performance will have to come in use. These new materials and processes should be process validated, and environmentally assessed. The Swedish microelectronics manufacturers do not use environmental assessment tools to determine if one alternative is "greener" than the other, as they have neither time nor legislative pressure. Instead, they refer to ´lists´ regarding limitations in the use of forbidden chemicals, and compare the ´lists´ with material safety data sheets. IVF in Sweden had the task of co-ordinating a governmentally financed project of which one of the goals was to advise producers, of microelectronics, on how to compare different material/process alternatives when introducing Pb-free soldering manufacturing technology. The scope of this paper is the evaluation of simplified and partial environmental assessment methods for microelectronics soldering. The problem addressed was the identified scarce understanding and under-use of environmental assessment methodologies in the small and medium sized enterprises in the Swedish electronics industry. A subtask was to analyse if it would be possible to perform a useful evaluation in one working day.A literature study revealed that several methods exist for environmental assessment, but most of them were assessed to be too complicated for the purpose of the present study. Two methods were introduced in the project; a qualitative Checklist Method (CM), and the quantitative Toxic Potential Indicator (TPI) that was used as a screening approach. The methods were tested at a microelectronics manufacturer to find out the applicability and the easiness of use. The checklist was applied to two wave soldering concepts and the TPI was applied to two Sn-Pb solder pastes and two Pb-free solder pastes. The CM generates information that can be used in the identification of qualitative environmental aspects, and the TPI provides fast but coarse results. It was possible for the company to perform this limited environmental assessment in one working day, as the amount of available input information is fairly limited. The participating microelectronics manufacturers in this study have confirmed this. The companies will use fast, understandable and rapidly introducible methods. The TPI was easy to use practically, but the input data available was regarded as too rough to distinguish among similar solder pastes. Anyway, by using the methods described in this paper, it would be possible to perform the assessment in one working day. It was perceived as worthwhile for the CM, and also to some degree for the TPI, despite data gaps for flux constituents. It is recommended that the flux constituents of solder pastes are risk evaluated to provide data for indicator tools like the TPI. The CM and the TPI should also be evaluated in industry sectors other than the microelectronics sector. This is needed to generally answer whether there are useful and systematic methods of environmental risk evaluation in product development. In a broader view, it should be researched what barriers are hindering small and medium sized enterprises to invest more in design for environment.
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43. |
- Andrae, Anders, 1973, et al.
(author)
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Significance of intermediate production processes in life cycle assessment of electronic products assessed using a generic compact model
- 2005
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In: Journal of Cleaner Production. ; 13:13-14, s. 1269-1279
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Journal article (peer-reviewed)abstract
- In this paper a generic model for life cycle inventory (LCI) data collection is presented and applied to a product system of a digital system telephone (DST). It is also shown that intermediate unit processes (IUPs) are of global warming importance. Compared to earlier efforts in the field of environmental life-cycle assessment of electronic products, the developed model enables a more partitioned LCA result, with respect to both components and processes. In our model the components are first divided into main groups and then into sub-groups. This division results in process modules for unit processes, some of which are similar for the ingoing components, thus reducing the computational effort. The model is demonstrated for a cradle-to-gate calculation focusing on greenhouse gas emissions. Using scenario analysis for integrated circuits and printed wiring boards, the possible contribution from IUPs was analysed.
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46. |
- Bailey, C., et al.
(author)
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Coffin-Manson constant determination for a Sn-8Zn-3Bi Lead-Free Solder Joint
- 2006
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In: Soldering and Surface Mount Technology. - : Emerald. - 1758-6836 .- 0954-0911. ; 18:2, s. 4-11
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Journal article (peer-reviewed)abstract
- Purpose To determine the Coffin-Manson (CM) equation constants for fatigue life estimation of Sn-8Zn-3Bi solder joints, since Sn-8Zn-3Bi solder has a melting temperature of around 199°C which is close to that of the conventional Sn-Pb solder which has previously been used in the electronics assembly industry. Design/methodology/approach Three dimensional finite element (FE) simulation analysis was used for comparison with the experimentally measured data and to determine the CM constants. Low cycle fatigue tests and FE simulations were carried out for these lead-free solder joints, and eutectic Sn-37Pb solder was used as a reference. Findings The CM equation for Sn-8Zn-3Bi solder joints was fitted to the lifetimes measured and the shear strains simulated. The constants were determined to be 0.0294 for C, the proportional constant, and for the fatigue exponent, β, −2.833. Originality/value The CM equation can now be used to predict the reliability of Sn-8Zn-3Bi solder joints in electronics assembly and the knowledge base for the properties of the Sn-Zn solder system has been increased.
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