High throughput high performance NoC switch

• Increasing the number of virtual channels can improve the throughput in an on-chip interconnection network. High Throughput Butterfly Fat Tree (HTBFT) architecture to achieve high performance Networks on Chip (NoC) is proposed. The architecture increases the throughput of the network by 38% while preserving the average latency. The area of HTBFT switch is decreased by 18% as compared to Butterfly Fat Tree switch.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Keyword

BFT

Latency

NoC

Throughput

Electric network topology

Interconnection networks

High performance networks

High throughputs

NoC switches

On-chip interconnection networks

Virtual channels

Publication and Content Type

ref (subject category)

kon (subject category)