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DEPS :
DEPS : Exploiting a Dynamic Error Prechecking Scheme to Improve the Read Performance of SSD
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Liu, W (author)
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Wu, F (author)
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Zhang, M (author)
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Yang, C (author)
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- Lu, Zhonghai (author)
- KTH,Elektronik och inbyggda system
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Wan, J (author)
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Xie, C (author)
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(creator_code:org_t)
- Institute of Electrical and Electronics Engineers Inc. 2021
- 2021
- English.
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In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. - : Institute of Electrical and Electronics Engineers Inc.. - 0278-0070 .- 1937-4151. ; 40:1, s. 66-77
- Related links:
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https://urn.kb.se/re...
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https://doi.org/10.1...
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Abstract
Subject headings
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- 3D NAND flash memory is gradually being widely used in solid state drives (SSD), leading to increasing storage capacity. However, the read performance of SSD is sacrificed for decoding operations which are executed to guarantee the data reliability. No matter whether the data have bit errors, they will be sent to error correcting code (ECC) engine to decode, introducing a high read delay of SSD. Error prechecking can help to avoid the redundant decoding operations for the error-free data, but it induces extra checking overhead to the error data. Motivated by this, we carry out comprehensive experiments to analyze the distribution of bit errors in 3D NAND flash memory. The preliminary experimental results show that there are a large number of pages read without errors in the early lifetime of 3D NAND flash memory. Based on the observations and analyses, we propose a model to estimate the error-free ratio, and utilize it to design a dynamic error prechecking scheme (DEPS) to bypass the decoding operation for the error-free data in 3D NAND flash memory and improve the read performance of SSD. Furthermore, by dividing a large page into small subpages, DEPS releases more error-free data, which significantly improves the read performance of SSD. Evaluation results from real-world traces demonstrate that by implementing DEPS, the average read performance of SSD is enhanced by 35% 55% with 3D MLC NAND flash memory.
Subject headings
- TEKNIK OCH TEKNOLOGIER -- Elektroteknik och elektronik -- Annan elektroteknik och elektronik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Electrical Engineering, Electronic Engineering, Information Engineering -- Other Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)
Keyword
- 3-d nand flash memory
- 3D NAND Flash memory
- Data reliability
- Decoding
- Error Prechecking
- Error correcting code
- Error correction codes
- Errors
- Evaluation results
- Flash-based SSDs
- Memory architecture
- NAND circuits
- NAND flash memory
- Parity check codes
- Read Performance.
- Read performance
- Registers
- Reliability
- SSD
- Solid modeling
- Solid state drives (SSD)
- Storage capacity
- Three-dimensional displays
Publication and Content Type
- ref (subject category)
- art (subject category)
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