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Symmetric-Mapping LUT-Based Method and Architecture for Computing X-Y-Like Functions
- Chen, Hui (author)
- Yang, Heping (author)
- Song, Wenqing (author)
- show more...
- Fu, Yuxiang (author)
- Li, Li (author)
- Yu, Zongguang (author)
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- (creator_code:org_t)
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2021
- 2021
- English.
- In: IEEE Transactions on Circuits and Systems Part 1. - : IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. - 1549-8328 .- 1558-0806. ; 68:3, s. 1231-1244
- Journal article (peer-reviewed)
Abstract
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- We propose a new method and hardware architecture to compute the functions expressed as XY ( X and Y are arbitrary floating-point numbers), which can support arbitrary Nth root, exponential and power operations. Because of the complexity of direct computation, we usually convert it to logarithm, multiplication, and antilogarithm operations. Traditional approaches suffer from long latency, large area and high power consumption. To solve this problem, we propose a symmetric-mapping lookup table (SM-LUT) to be capable of computing log(2) x (x is an element of [1, 2]) and 2 x (x is an element of [0, 1]) simultaneously. It lays the foundation for computing XY. To further improve hardware performance of our architecture, we propose a multi-region address searcher to speed up the calculation of SM-LUT. In addition, we use an optimized Vedic multiplier to shorten the critical path and improve the efficiency of multiplication, which is included in computing X-Y. Under the TSMC 40nm CMOS technology, we design and synthesize a reference circuit to compute X-Y with a maximum relative error of 10(-3). The report shows that the reference circuit achieves the area of 14338.50 mu m(2) and the power consumption of 4.59 mW at the frequency of 1 GHz. In comparison with the state-of-the-art work under the same input range and similar precision, it saves 78.57% area and 80.42% power consumption for (N)root R computation and 82.89% area and 81.89% power consumption for R-N computation averagely. On top of that, our architecture reduces the computation latency by 62.77% averagely and has one more order of magnitude of energy efficiency than others.
Subject headings
- NATURVETENSKAP -- Data- och informationsvetenskap -- Datorteknik (hsv//swe)
- NATURAL SCIENCES -- Computer and Information Sciences -- Computer Engineering (hsv//eng)
Keyword
- Floating-point
- X-Y-like functions
- symmetric-mapping LUT
- multi-region address searcher
- Vedic multiplier
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- ref (subject category)
- art (subject category)
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- Chen, Hui
- Yang, Heping
- Song, Wenqing
- Lu, Zhonghai
- Fu, Yuxiang
- Li, Li
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- Yu, Zongguang
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- Royal Institute of Technology
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