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Electrical characterization of 12 nm EJ-MOSFETs on SOI substrates

Henschel, W (author)
Wahlbrink, T (author)
Georgiev, Y M (author)
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Lemme, Max C., 1970- (author)
AMO GmbH, AMICA, Aachen, Germany
Mollenhauer, T (author)
Vratzov, B (author)
Fuchs, A (author)
Kurz, H (author)
Kittler, M (author)
Schwierz, F (author)
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 (creator_code:org_t)
Elsevier BV, 2004
2004
English.
In: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 48:5, s. 739-745
  • Journal article (peer-reviewed)
Abstract Subject headings
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  • A dual gate metal oxide semiconductor field effect transistor (MOSFET) with electrically variable shallow junctions (EJ-MOSFET) has been fabricated on silicon on insulator (SOI) substrates. This kind of transistor allows testing the limits of scalability at relaxed process requirements. Transistor gate lengths down to 12 run have been structured by electron beam lithography (EBL) and specific etching processes. The coupling of the upper gate to the inner transistor is carefully investigated.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Nanoteknik (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Nano-technology (hsv//eng)

Keyword

EJ-MOSFET
12 nm gate length
shallow junction
SOI
HSQ
electron beam lithography

Publication and Content Type

ref (subject category)
art (subject category)

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