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Extending Platform-Based Design to Network on Chip Systems
- Soininen, Juha-Pekka (author)
-
- Jantsch, Axel (author)
- KTH,Mikroelektronik och informationsteknik, IMIT
- Forsell, Martti (author)
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- Pelkonen, Antti (author)
- Kreku, Jari (author)
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- (creator_code:org_t)
- 2003
- 2003
- English.
- In: Proceedings of the International Conference on VLSI Design.
- Conference paper (peer-reviewed)
Abstract
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- Exploitation of silicon capacity will require improvements in design productivity and more scalable system paradigms. Asynchronous message passing networks on chip (NOC) have been proposed as backbones for billion-transistor ASICs. We present a novel layered backbone-platform-system (BPS) design methodology for development of network-on-chip based products. It combines and extends the distributed, parallel, embedded and platform-based design concepts in order to manage the diversity and complexity of NOCbased-systems. The reuse of communication principles in various platforms, the reuse of platforms in product differentiation, and system-level decision-support methods are the cornerstones of our methodology. The presented mappability estimation and workload simulations demonstrate the feasibility of such methods.
Subject headings
- TEKNIK OCH TEKNOLOGIER -- Elektroteknik och elektronik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)
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