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System level virtua...
System level virtual prototyping of DSP ASICs using grammar based approach
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- Hemani, Ahmed (author)
- KTH,Elektroniksystem
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- Öberg, Johnny (author)
- KTH,Elektroniksystem
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- Deb, Abhijit Kumar (author)
- KTH,Elektroniksystem
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- Lindqvist, Dan (author)
- Ericsson Radio Systems AB
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- Fjellborg, Björn (author)
- Ericsson Radio Systems AB
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(creator_code:org_t)
- 1999
- 1999
- English.
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In: Rapid System Prototyping, 1999. IEEE International Workshop on. ; , s. 166-171
- Related links:
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https://urn.kb.se/re...
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https://doi.org/10.1...
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Abstract
Subject headings
Close
- DSP systems are often modeled using functional and bit-true level simulators, where it is not possible to validate the system level timing, control and configuration (SLTCC) of the product. In this paper, we present a methodology that adds SLTCC specified in grammar to functional models to create a rate true system level virtual prototype. The methodology is illustrated and benefits are quantified using two realistic examples
Subject headings
- TEKNIK OCH TEKNOLOGIER -- Elektroteknik och elektronik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)
Keyword
- DSP ASICs;bit-true level simulators;control and configuration;grammar based approach;system level timing;system level virtual prototype;system level virtual prototyping;application specific integrated circuits;computational complexity;digital signal processing chips;software prototyping;timing
Publication and Content Type
- ref (subject category)
- kon (subject category)
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