Search: onr:"swepub:oai:DiVA.org:kth-89937" >
Exploring ASIC Desi...
Exploring ASIC Design Space at System Level with a Neural Network Estimator
-
- Ellervee, Peeter (author)
- KTH,Elektroniksystemkonstruktion
-
- Jantsch, Axel (author)
- KTH,Elektroniksystemkonstruktion
-
- Öberg, Johnny (author)
- KTH,Elektroniksystemkonstruktion
-
show more...
-
- Hemani, Ahmed (author)
- KTH,Elektroniksystemkonstruktion
-
- Tenhunen, Hannu (author)
- KTH,Elektroniksystemkonstruktion
-
show less...
-
(creator_code:org_t)
- 1994
- 1994
- English.
-
In: Proc. of IEEE ASIC-conference, 1994.
- Related links:
-
http://ieeexplore.ie...
-
show more...
-
https://urn.kb.se/re...
-
show less...
Abstract
Subject headings
Close
- Estimators are critical tools in doing architectural level exploration of the design space. We present a novel approach to estimation based on the multilayer perceptron which builds the estimation function during the learning process and thus allows to describe arbitrary complex functions. We also describe how the control data flow graph is encoded for the neural network input and we present results of the first experiments made with realistic design examples.
Subject headings
- TEKNIK OCH TEKNOLOGIER -- Elektroteknik och elektronik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)
Publication and Content Type
- ref (subject category)
- kon (subject category)
To the university's database