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Test Scheduling for...
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Ingelsson, UrbanIDA Linköpings Universitet
(author)
Test Scheduling for Modular SOCs in an Abort-on-Fail Environment
- Article/chapterEnglish2005
Publisher, publication year, extent ...
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Tallinn, Estonia :IEEE Computer Society Press,2005
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LIBRIS-ID:oai:DiVA.org:liu-24699
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https://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-24699URI
Supplementary language notes
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Language:English
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Summary in:English
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Subject category:ref swepub-contenttype
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Subject category:kon swepub-publicationtype
Notes
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Complex SOCs are increasingly tested in a modular fashion, which enables us to record the yield-per-module. In this paper, we consider the yield-per-module as the pass probability of the module s manufacturing test. We use it to exploit the abort-on-fail feature of ATEs, in order to reduce the expected test application time. We present a model for expected test application time, which obtains increasing accuracy due to decreasing granularity of the abortable test unit. For a given SOC, with a modular test architecture consisting of wrappers and disjunct TAMs, and for given pass probabilities per module test, we schedule the tests on each TAM such that the expected test application time is minimized. We describe two heuristic scheduling approaches, one without and one with preemption. Experimental results for the ITC 02 SOC Test Benchmarks demonstrate the effectiveness of our approach, as we achieve up to 97% reduction in the expected test application time, without any modification to the SOC or ATE.
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Goel, Sandeep KumarIC Design Digital Design and Test Philips Research Labs
(author)
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Larsson, Erik,1966-Linköpings universitet,Tekniska högskolan,ESLAB - Laboratoriet för inbyggda system(Swepub:liu)erila46
(author)
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Marinissen, Erik JanIC Design Digital Design and Test Philips Research Labs
(author)
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IDA Linköpings UniversitetIC Design Digital Design and Test Philips Research Labs
(creator_code:org_t)
Related titles
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In:IEEE European Test Symposium ETS 05,2005Tallinn, Estonia : IEEE Computer Society Press
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