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Partitioning the Ne...
Partitioning the Network-on-Chip to Enable Virtualization on Many-Core Processors
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- Becker, Matthias (author)
- Mälardalens högskola,Inbyggda system
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- Dasari, Dakshina (author)
- Research and Technology Centre, Robert Bosch, India
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- Nélis, Vincent (author)
- CISTER/INESC-TEC, ISEP, Portugal
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- Behnam, Moris (author)
- Mälardalens högskola,Inbyggda system
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- Nolte, Thomas (author)
- Mälardalens högskola,Inbyggda system
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(creator_code:org_t)
- 2015
- 2015
- English.
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In: The 6th International Real-Time Scheduling Open Problems Seminar RTSOPS'15.
- Related links:
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https://urn.kb.se/re...
Abstract
Subject headings
Close
- Technological advances have increased the transistor density, thereby ushering in multi- and more recently many-core systems, distinguished by the presence of hundreds of cores on a single chip. For such a platform, the Network-on-Chip (NoC) has emerged as a scalable and efficient interconnect fabric to realize the communication across an ever increasing number of processor cores, memories, and specialized IP blocks both on- and off-chip. In this paper, we highlighted some key problems in NoC based architectures that must be addressed before the deployment of real-time applications onto these platforms becomes possible. A paradigm shift from function centric to data and communication centric approaches is required. Combining hardware and software based flow-regulation seems to be the only way to ensure that NoCs go beyond the best-effort service and address the requirements of diverse applications.
Subject headings
- NATURVETENSKAP -- Data- och informationsvetenskap (hsv//swe)
- NATURAL SCIENCES -- Computer and Information Sciences (hsv//eng)
Keyword
- many-corereal-timeNetwork-on-Chiptraffic shaping
Publication and Content Type
- ref (subject category)
- kon (subject category)
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