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An ultra-low power ...
An ultra-low power high-precision logarithmic-curvature compensated all-CMOS voltage reference in 65 nm CMOS
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- Ghanavati Nejad, Tayebeh (author)
- Shahid Chamran University of Ahvaz
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- Farshidi, Ebrahim (author)
- Shahid Chamran University of Ahvaz
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- Sjöland, Henrik (author)
- Lund University,Lunds universitet,Integrerade elektroniksystem,Forskargrupper vid Lunds universitet,Integrated Electronic Systems,Lund University Research Groups
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- Kosarian, Abdolnabi (author)
- Shahid Chamran University of Ahvaz
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(creator_code:org_t)
- 2021-02-25
- 2021
- English.
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In: Analog Integrated Circuits and Signal Processing. - : Springer Science and Business Media LLC. - 0925-1030 .- 1573-1979. ; 107:2, s. 319-330
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Abstract
Subject headings
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- In this paper, a low-complexity resistorless high-precision sub-1 V MOSFET-only voltage reference is presented. To obtain an accurate output, a curvature-compensation technique is used, canceling its logarithmic temperature dependence regardless of the value of the mobility temperature exponent (γ). The circuit is realized in 65 nm CMOS technology and yields an output voltage of 574 mV, a temperature coefficient of 3.5 ppm∘C in the range of − 50 to 150 °C, a power supply rejection ratio (PSRR) of − 103 dB at 100 Hz, a line sensitivity of 6μVV in the supply voltage range of 1.3–3 V, a power dissipation of 650nW at 1.3 V supply, and an output noise of 1.7 μV/Hz at 100 Hz. The total active area of the design is 0.03 mm2. This voltage reference is suitable for low-power low-voltage applications which also require high precision.
Subject headings
- TEKNIK OCH TEKNOLOGIER -- Elektroteknik och elektronik -- Signalbehandling (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Electrical Engineering, Electronic Engineering, Information Engineering -- Signal Processing (hsv//eng)
Keyword
- All-CMOS
- Curvature-compensation
- Low noise
- Low power
- Low voltage
- PSRR
- TC
- Voltage reference
Publication and Content Type
- art (subject category)
- ref (subject category)
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