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A 0.13µm CMOS ΔΣ PLL FM Transmitter
- Wu, Ying (author)
-
- Liu, Xiaodong (author)
- Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
- Ye, Dawei (author)
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- Viswam, Vijay (author)
- Zhu, Lin (author)
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- (creator_code:org_t)
- 2011
- 2011
- English 4 s.
- In: [Host publication title missing]. - 9781457705144
- Conference paper (peer-reviewed)
Abstract
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- A short range FM transmitter is presented. It uses an architecture where the output frequency of a phase locked loop (PLL) is modulated by varying the division number of the feedback divider, using the 1-bit output of a ΔΣ ADC. The measured total harmonic distortion (THD) plus noise is less than 1% at 75 kHz deviation. The transmitter is fully integrated in a 0.13µm CMOS process and the core area is 0.24 mm2. The current consumption is 4.4mA from a 1.2V supply.
Subject headings
- TEKNIK OCH TEKNOLOGIER -- Elektroteknik och elektronik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)
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- Wu, Ying
- Liu, Xiaodong
- Ye, Dawei
- Viswam, Vijay
- Zhu, Lin
- Lu, Ping
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- Radjen, Dejan
- Sjöland, Henrik
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