Coded IDMA system performance with parallel interleavers

• In this paper we evaluate the use of parallel interleavers for user separation in coded IDMA systems. The parallel interleavers have previously been evaluated for uncoded systems, and we here present extended results for the coded case. The new results are important for real systems, as they will most likely use performance enhancing channel coding. The parallel interleavers are designed to remove the risk of memory access collision during interleaving. These problems may occur when the interleaving process is being parallelized in order to support parallel processing at the decoder. The results show that the degree of parallelization in the interleaver design has an insignificant effect on the considered coded system performance. Furthermore, our results also show that the use of parallel interleavers gives a performance that is similar to that obtained when using random interleavers.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Keyword

system performance

IDMA

parallel interleavers

Publication and Content Type

kon (subject category)

ref (subject category)