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A 1.8 GHz CMOS VCO with reduced phase noise

Andreani, Pietro (author)
Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
Sjöland, Henrik (author)
Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
 (creator_code:org_t)
2001
2001
English.
In: 2001 Symposium on VLSI Circuits, 2001. Digest of Technical Papers.. - 4891140143 ; , s. 121-122
  • Conference paper (peer-reviewed)
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  • A 2 V, 6 mA, 15% tuning range, 1.8 GHz VCO implemented in a standard 0.35 μm CMOS process is presented. The phase noise of the VCO has been greatly reduced by means of on-chip filters and one off-chip low frequency inductor. The phase noise measured at 3 MHz offset from the carrier is between -141.5 dBc/Hz and -138.5 dBc/Hz over the whole tuning range

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

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Andreani, Pietro
Sjöland, Henrik
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ENGINEERING AND TECHNOLOGY
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and Electrical Engin ...
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Lund University

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