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Noise optimization of an inductively degenerated CMOS low noise amplifier
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- Andreani, Pietro (author)
- Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
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- Sjöland, Henrik (author)
- Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
- (creator_code:org_t)
- Institute of Electrical and Electronics Engineers (IEEE), 2001
- 2001
- English.
- In: IEEE Transactions on Circuits and Systems - 2, Analog and Digital Signal Processing. - : Institute of Electrical and Electronics Engineers (IEEE). - 1057-7130. ; 48:9, s. 835-841
- Journal article (peer-reviewed)
Abstract
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- This paper presents a technique for substantially reducing the noise of a CMOS low noise amplifier implemented in the inductive source degeneration topology. The effects of the gate induced current noise on the noise performance are taken into account, and the total output noise is strongly reduced by inserting a capacitance of appropriate value in parallel with the amplifying MOS transistor of the LNA. As a result, very low noise figures become possible already at very low power consumption levels
Subject headings
- TEKNIK OCH TEKNOLOGIER -- Elektroteknik och elektronik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)
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