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A direct conversion quadrature transmitter with digital interface in 45 nm CMOS for high-speed 60 GHz communications

Abbasi, Morteza, 1982 (author)
Chalmers tekniska högskola,Chalmers University of Technology
Kjellberg, Torgil, 1962 (author)
Chalmers tekniska högskola,Chalmers University of Technology
de Graauw, A. (author)
Nxp Semiconductors Netherlands Bv
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Roovers, R. (author)
Nxp Semiconductors Netherlands Bv
Zirath, Herbert, 1955 (author)
Chalmers tekniska högskola,Chalmers University of Technology
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 (creator_code:org_t)
ISBN 9781424482931
2011
2011
English.
In: Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium. Baltimore, 5-7 June 2011. - 1529-2517. - 9781424482931
  • Conference paper (peer-reviewed)
Abstract Subject headings
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  • A compact 60 GHz direct conversion quadrature transmitter is designed and fabricated in 45 nm standard LP CMOS. The transmitter features an integrated power amplifier with continuous output level control and interfaces binary data signals with nominal peak-to-peak voltage swing of 300 mV. The highest measured modulation bandwidth is limited by the measurement setup to 4 GHz but is simulated to be as high as 10 GHz. In single sideband up-converting operation mode, the measured image suppression ratio is 22 dB with 36 dB of carrier suppression corresponding to approximately 8% EVM in the output signal constellation. The output RF frequency can be from 54 GHz to 66 GHz to accommodate several channels and the output power can be adjusted from -3 dBm to 10 dBm. The chip is operated from a 2 V supply and draws 180 mA current.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Keyword

differential 90° coupler
direct conversion
60 GHz
quadrature transmitter
45nm CMOS

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