A study of recent advances in cache memories

• Registers within a processor, cache within, on, or outside the processor, and virtual memory on the disk drive builds memory hierarchy in modern computer systems. The principle of locality of reference makes this memory hierarchy work efficiently. In recent years, cache organizations and designs have witnessed several advances that have not only improved their performance such as hit rates, speed, latency, energy consumption, etc. but various new designs and organizations for chip multi-processors such as multilevel caches, Non-Uniform Cache Access (NUCA), hybrid caches, etc. have also emerged. This paper presents a study of current competing processors in terms of various factors determining performance and throughput of cache organization and design. To evaluate their performance and viability, it reviews recent cache trends that include hybrid cache memory, non-uniform cache architecture, energy efficient replacement algorithms, cache memory programming, software defined caches and emerging techniques for making cache reliable against soft errors. It discusses the pros and cons of emerging cache architectures and designs.

Subject headings

NATURVETENSKAP  -- Data- och informationsvetenskap -- Datorteknik (hsv//swe)

NATURAL SCIENCES  -- Computer and Information Sciences -- Computer Engineering (hsv//eng)

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik -- Kommunikationssystem (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering -- Communication Systems (hsv//eng)

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik -- Datorsystem (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering -- Computer Systems (hsv//eng)

Keyword

Reliability

Memory management

Organizations

Algorithm design and analysis

Random access memory

Cache memory

Publication and Content Type

kon (subject category)

ref (subject category)