| 1. |
- Jeppson, Kjell, 1947, et al.
(author)
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Test structures for studying flexible interconnect supported by carbon nanotube scaffolds
- 2017
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In: IEEE International Conference on Microelectronic Test Structures. ; 2017
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Conference paper (peer-reviewed)abstract
- Due to their flexibility and compatibility withsilicon devices, the use of carbon nanotubes as scaffolds for metal interconnect in flexible and wearable electronics has been proposed. This paper examines the performance of dual-height carbon nanotubes as flexible scaffolds for horizontal and vertical interconnects. For this purpose, a number of test structures have been designed and fabricated and their electrical and mechanical performance been investigated.
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| 2. |
- Jiang, Di, 1983, et al.
(author)
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A flexible and stackable 3D interconnect system using growth-engineered carbon nanotube scaffolds
- 2017
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In: Flexible and Printed Electronics. - : IOP Publishing. - 2058-8585. ; 2:2
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Journal article (peer-reviewed)abstract
- One of the critical challenges for realizing flexible electronic systems for a wide range of applications is the development of materials for flexible and stackable interconnects. We propose and demonstrate a three-dimensional (3D)interconnect structure embedded in a polymeric substrate using metal-coated carbon nanotube (CNT)scaffolds. By using two different underlayer materials for the catalyst, onestep synthesis of a dual-height CNT interconnect scaffold was realized. The CNT scaffolds serve as flexible cores for both annular metal through-substrate-vias and for horizontal metal interconnect. The 3D-CNT network was fabricated on a silicon substrate, and once the scaffolds were covered by metal, they were embedded in a polymer serving as a flexible substrate after peel-off from the silicon substrate. The 3D-CNT interconnect network was exposed to mechanical bending and stretching tests while monitoring its electrical properties. Even after 300 cycles no significant increase of resistances was found. Electrically there is a trade-off between flexibility and conductivity due to the surface roughness of the scaffold. However, this is to some extent alleviated by the metalized sidewalls giving the horizontal wires a cross-sectional area larger than indicated by their footprint. For gold wires 200 nm thick, measurements indicated a resistivity of 18 μΩ.cm, a value less than one order of magnitude larger than that of bulk gold, and a value that is expected to improve as technology improves. The mechanical properties of the metalized scaffolds were simulated using a finite element model. The potential scale-up capability of the proposed 3D-CNT network was demonstrated by the stacking of two such polymer-embedded interconnect systems.
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| 3. |
- Kabiri Samani, Majid, 1976, et al.
(author)
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Improving Thermal Transport at Carbon Hybrid Interfaces by Covalent Bonds
- 2018
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In: Advanced Materials Interfaces. - : Wiley. - 2196-7350. ; 5:15
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Journal article (peer-reviewed)abstract
- Graphene and carbon nanotubes have received much attention for thermal management application due to their unique thermal performance. Theoretical work suggests that a covalent bond can combine 1D carbon nanotubes with 2D graphene together to extend the excellent thermal property to three dimensions for heat dissipation. This paper experimentally demonstrates the high heat dissipation capability of a freestanding 3D multiwall carbon nanotube (MWCNT) and graphene hybrid material. Using high-resolution transmission electron microscopy and pulsed photothermal reflection measurement method, the covalent bonds between MWCNT and planar graphene are microscopically and numerically demonstrated. Thermal resistance at the junction with covalent bonds is 9×10^−10 Kelvin square meter per watt, which is three orders of magnitude lower than van der Waals contact. Joule heating method is used to verify the extra cooling effect of this 3D hybrid material compared to graphite film. A demonstrator using high power chip is developed to demonstrate the applicability of this hybrid material in thermal application. Temperature at hot spots can be decreased by around 10°C with the assistance of this hybrid material. These findings are very significant for understanding the thermal conduction during combining 1D and 2D carbon material together for future thermal management application.
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| 4. |
- Mu, Wei, 1985, et al.
(author)
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Controllable and fast synthesis of bilayer graphene by chemical vapor deposition on copper foil using a cold wall reactor
- 2016
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In: Chemical Engineering Journal. - : Elsevier BV. - 1385-8947. ; 304:15 November 2016, s. 106-114
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Journal article (peer-reviewed)abstract
- Bilayer graphene is attractive for digital device applications due to the appearance of a bandgap under application of an electrical displacement field. Controllable and fast synthesis of bilayer graphene on copper by chemical vapor deposition is considered a crucial process from the perspective of industrial applications. Here, a systematic investigation of the influence of process parameters on the growth of bilayer graphene by chemical vapor deposition in a low pressure cold wall reactor is presented. In this study, the initial process stages have been of particular interest. We have found that the influence of the hydrogen partial pressure on synthesis is completely the opposite from that found for traditional tubular quartz CVD in terms of its influence on the graphene growth rate. H2/CH4 ratio was also found to effectively influence the properties of the synthesized bilayer graphene in terms of its atomic structure, whether it be AB-stacked or misoriented. Different pre-treatments of the copper foil, in combination with different annealing processes, were used to investigate the nucleation process with the aim of improving the controllability of the synthesis process. Based on an analysis of the nucleation activity, adsorption-diffusion and gas-phase penetration were employed to illustrate the synthesis mechanism of bilayer graphene on copper foil. After optimization of the synthesis process, large areas, up to 90% of a copper foil, were covered by bilayer graphene within 15 minutes. The total process time is only 45 minutes, including temperature ramp-up and cool-down by using a low pressure cold wall CVD reactor.
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| 5. |
- Mu, Wei, 1985, et al.
(author)
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Double-Densified VerticallyAligned Carbon Nanotube Bundles for Application in 3D Integration High Aspect Ratio TSV Interconnects
- 2016
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In: Proceedings - Electronic Components and Technology Conference. - 0569-5503. - 9781509012046 ; 2016-August, s. 211-216
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Conference paper (peer-reviewed)abstract
- The treatment of densification by vapor on pristineMWCNT bundles are necessary to improve the effective area of the CNT TSV. However, the CNT bundles might tilt partly because of the non-uniform densification at root of the bundle, especially when it comes to the high aspect ratio CNT bundles. In order to solve these problems, a double densification process has been proposed and developed here. First of all, the shape of partial densified CNT bundles were optimized as a function of time. After several steps such as transferring of partial densified CNT bundles into the via, second densification, epoxy filling and chemical mechanical polishing, the CNT filled TSV with aspect ratio of 10 was achieved. The current voltage response of the CNT TSV interconnection indicated good electrical connection was formed. The resistivity of CNT bundles in via was calculated to be around 2-3 milli-ohmcm.
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| 6. |
- Mu, Wei, 1985, et al.
(author)
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Tape-Assisted Transfer of Carbon Nanotube Bundles for Through-Silicon-Via Applications
- 2015
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In: Journal of Electronic Materials. - : Springer Science and Business Media LLC. - 1543-186X .- 0361-5235. ; 44:8, s. 2898-2907
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Journal article (peer-reviewed)abstract
- Robust methods for transferring vertically aligned carbon nanotube (CNT) bundles into through-silicon vias (TSVs) are needed since CNT growth is not compatible with complementary metal–oxide–semiconductor (CMOS) technology due to the temperature needed for growing high-quality CNTs (∼700°C). Previous methods are either too complicated or not robust enough, thereby offering too low yields. Here, a facile transfer method using tape at room temperature is proposed and experimentally demonstrated. Three different kinds of tape, viz. thermal release tape, Teflon tape, and Scotch tape, were applied as the medium for CNT transfer. The CNT bundle was adhered to the tape through a flip-chip bonder, and the influence of the bonding process on the transfer results was investigated. Two-inch wafer-scale transfer of CNT bundles was realized with yields up to 97% demonstrated. After transfer, the use of several different polymers was explored for filling the gap between the transferred CNT bundle and the sidewalls of the TSV openings to improve the filling performance. The current–voltage characteristic of the CNT TSVs indicated good electrical performance, and by measuring the via resistance as a function of via thickness, contact resistances could be eliminated and an intrinsic CNT resistivity of 1.80 mΩ cm found.
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| 7. |
- Sun, Shuangxi, 1986, et al.
(author)
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Vertically aligned CNT-Cu nano-composite material for stacked through-silicon-via interconnects
- 2016
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In: Nanotechnology. - : IOP Publishing. - 1361-6528 .- 0957-4484. ; 27:33, s. Art no335705-
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Journal article (peer-reviewed)abstract
- For future miniaturization of electronic systems using 3D chip stacking, new fine-pitch materials for through-silicon-via (TSV) applications are likely required. In this paper, we propose a novel carbon nanotube (CNT)/copper nanocomposite material consisting of high aspect ratio, vertically aligned CNT bundles coated with copper. These bundles, consisting of hundreds of tiny CNTs, were uniformly coated by copper through electroplating, and aspect ratios as high as 300: 1 were obtained. The resistivity of this nanomaterial was found to be as low as similar to 10(-8) Omega m, which is of the same order of magnitude as the resistivity of copper, and its temperature coefficient was found to be only half of that of pure copper. The main advantage of the composite TSV nanomaterial is that its coefficient of thermal expansion (CTE) is similar to that of silicon, a key reliability factor. A finite element model was set up to demonstrate the reliability of this composite material and thermal cycle simulations predicted very promising results. In conclusion, this composite nanomaterial appears to be a very promising material for future 3D TSV applications offering both a low resistivity and a low CTE similar to that of silicon.
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| 8. |
- Zhang, Yong, 1982, et al.
(author)
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2D HEAT DISSIPATION MATERIALS FOR MICROELECTRONICS COOLING APPLICATIONS
- 2016
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In: China Semiconductor Technology International Conference 2016, CSTIC 2016. - 9781467388047
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Conference paper (peer-reviewed)abstract
- The need for faster and smaller, as well as more reliable and efficient consumer electronic products has resulted in microelectronic components that produce progressively more heat. The resultant reliability issues from the increased heat flux are serious and hinder technological development. One solution for microelectronics cooling applications is 2D materials applied as heat spreaders and these include monolayer graphene, graphene based films, and monolayer hexagonal boron nitride and BN based films. In addition, thermal performances of the graphene heat spreader were also studied under different packaging structures, including wire bonding, cooling fins and flip chips. Finally, 2D hexagonal Boron nitride (h-BN) heat spreaders, fabricated by different methods, had their heat dissipation performances characterized by different thermal characterization methods, such as resistance temperature detector (RTD) and Infrared (IR) methods. In conclusion, these new novel 2D materials developed show great potential for microelectronics cooling applications.
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| 9. |
- Bao, Jie, et al.
(author)
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Application of two-dimensional layered hexagonal boron nitride in chip cooling
- 2016
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In: Yingyong Jichu yu Gongcheng Kexue Xuebao/Journal of Basic Science and Engineering. - 1005-0930. ; 24:1, s. 210-217
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Journal article (peer-reviewed)abstract
- © 2016, The Editorial Board of Journal of Basic Science and Engineering. All right reserved.Research into layered hexagonal boron nitride(h-BN)has recently intensified, due to its superior physicochemical properties compared to that of a typical two-dimensional material. H-BN can be utilized in power chips as both an insulating layer as well as a heat spreader for local hotspots with high heat flux. Single layer h-BN film grown by CVD and h-BN microparticles are respectively transferred onto the surfaces of the thermal evaluation chips, where the influence of h-BN on the heat dissipation performance of the chips can be observed at different power values. The resistance-temperature curve method and infrared thermal imager are both used to measure the temperature of hotspots on the thermal evaluation chips, which can be reduced by between 3~5℃ at 1W after the transfer of h-BN. The cooling efficiency is improved and it can be found that single layer h-BN film shows better heat dissipation ability.
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| 10. |
- Bistarelli, Silvia, et al.
(author)
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Evaluating CNT-Based Interconnects : A Nummerical Tool to Characterize Hybrid CNT-Copper Interconnects
- 2017
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In: IEEE Microwave Magazine. - 1527-3342 .- 1557-9581. ; 18:4, s. 124-129
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Journal article (peer-reviewed)abstract
- Nanotechnologies offer a vast number of applications due to the unique features of nanostructured materials [1]. In the electronics field, this new technology could open innovative ways to go beyond Moore's law [2], but progress in manufacturing technology still limits the wide dispersion of nanotechnology-based circuits. The bridge between nanoscience and realized devices can be achieved by modeling the multiphysics phenomena at the nanoscale, which will aid in the development of the technology.
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