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- Gaona, E., et al.
(author)
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Selective dynamic serialization for reducing energy consumption in hardware transactional memory systems
- 2014
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In: Journal of Supercomputing. - : Springer Science and Business Media LLC. - 1573-0484 .- 0920-8542. ; 68:2, s. 914-934
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Journal article (peer-reviewed)abstract
- In the search for new paradigms to simplify multithreaded programming, Transactional Memory (TM) is currently being advocated as a promising alternative to deadlock-prone lock-based synchronization. In this way, future many-core CMP architectures may need to provide hardware support for TM. On the other hand, power dissipation constitutes a first class consideration in multicore processor designs. In this work, we propose Selective Dynamic Serialization (SDS) as a new technique to improve energy consumption without degrading performance in applications with conflicting transactions by avoiding wasted work due to aborted transactions. Our proposal, which is implemented on top of a hardware transactional memory (HTM) system with an eager conflict management policy, detects and serializes conflicting transactions dynamically (at run-time). In its simplest form, in case of conflict, one transaction is allowed to continue whilst the rest are completely stalled. Once the executing transaction has finished, it wakes up several of the stalling transactions. More elaborated implementations of SDS try to delay this behavior until serialization of transactions is profitable, achieving the best trade-off between performance, energy savings and network traffic. SDS implementations differ from each other in the condition that triggers the serialization mode. We have evaluated several SDS schemes using GEMS, a full-system simulator implementing the LogTM-SE Eager-Eager HTM system, and several benchmarks from the STAMP suite. Results for a 16-core CMP show that SDS obtains reductions of 6 % on average in energy consumption (more than 20 % in high contention scenarios) in a wide range of benchmarks without affecting, on average, execution time. At the same time, network traffic level is also reduced by 22 %.
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| 3. |
- Lopez-Vicario, C, et al.
(author)
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Association of a variant in the gene encoding for ERV1/ChemR23 with reduced inflammation in visceral adipose tissue from morbidly obese individuals
- 2017
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In: Scientific reports. - : Springer Science and Business Media LLC. - 2045-2322. ; 7:1, s. 15724-
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Journal article (peer-reviewed)abstract
- Obesity comorbidities are closely associated with chronic low-grade adipose tissue inflammation. A number of SNPs associated with inflammation has been identified, underscoring the impact of genetic determinants on this process. Here, we screened SNPs in genes with pro-inflammatory (IL-1β, IL-6, STAT3 and JAK2), anti-inflammatory (IL-10 and SOCS3) and pro-resolving (ERV1/ChemR23) properties in 101 obese and 99 non-obese individuals. Among the SNPs analyzed, we identified that individuals carrying a C allele in the rs1878022 polymorphism of the ERV1/ChemR23 gene, which encodes for the receptor of the pro-resolving mediator RvE1, had increased ERV1/ChemR23 protein expression and reduced levels of the inflammatory cytokine IL-6 in adipose tissue. Moreover, patients carrying the C allele in homozygosity had lower plasma levels of IL-6, IFN-α2, IL-15, IL-1ra, IL-10, GM-CSF, G-CSF and VEGF and enhanced leukocyte responsiveness to RvE1. C-carriers also exhibited decreased TAG to HDL ratio, a surrogate marker of insulin resistance and a predictor of incident fatty liver. Finally, we confirmed in vivo that the ERV1/ChemR23 receptor regulates systemic and tissue inflammation since mice lacking ERV1/ChemR23 expression showed increased IL-6 levels in adipose tissue and peritoneal macrophages. Together, our study identified an ERV1/ChemR23 variant that protects patients with obesity from excessive inflammatory burden.
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| 5. |
- Negi, Anurag, 1980, et al.
(author)
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Eager meets lazy: The impact of write-buffering on hardware transactional memory
- 2011
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In: Proceedings of the International Conference on Parallel Processing. 40th International Conference on Parallel Processing, ICPP 2011, Taipei City, 13-16 September 2011. - 0190-3918. - 9780769545103 ; , s. 73-82
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Conference paper (peer-reviewed)abstract
- Hardware transactional memory (HTM) systems have been studied extensively along the dimensions of speculative versioning and contention management policies. The relative performance of several designs policies has been discussed at length in prior work within the framework of scalable chipmultiprocessing systems. Yet, the impact of simple structural optimizations like write-buffering has not been investigated and performance deviations due to the presence or absence of these optimizations remains unclear. This lack of insight into the effective use and impact of these interfacial structures between the processor core and the coherent memory hierarchy forms the crux of the problem we study in this paper. Through detailed modeling of various write-buffering configurations we show that they play a major role in determining the overall performance of a practical HTM system. Our study of both eager and lazy conflict resolution mechanisms in a scalable parallel architecture notes a remarkable convergence of the performance of these two diametrically opposite design points when write buffers are introduced and used well to support the common case. Mitigation of redundant actions, fewer invalidations on abort, latency-hiding and prefetch effects contribute towards reducing execution times for transactions. Shorter transaction durations also imply a lower contention probability, thereby amplifying gains even further. The insights, related to the interplay between buffering mechanisms, system policies and workload characteristics, contained in this paper clearly distinguish gains in performance to be had from write-buffering from those that can be ascribed to HTM policy. We believe that this information would facilitate sound design decisions when incorporating HTMs into parallel architectures.
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| 6. |
- Negi, Anurag, 1980, et al.
(author)
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Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory
- 2012
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In: Proceedings - International Symposium on High-Performance Computer Architecture. - 1530-0897. - 9781467308243 ; , s. 141-151
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Conference paper (peer-reviewed)abstract
- Lazy hardware transactional memory has been shown to be more efficient at extracting available concurrency than its eager counterpart. However, it poses scalability challenges at commit time as existence of conflicts among concurrent transactions is not known prior to commit. Non-conflicting transactions may have to wait before committing, severely affecting performance in certain workloads. Early conflict detection can be employed to allow such transactions to commit simultaneously. In this paper we show that the potential of this technique has not yet been fully utilized, with design choices in prior work severely burdening common-case transactional execution to avoid some relatively uncommon correctness concerns. The paper quantifies the severity of the problem and develops. pi-TM, an early conflict detection - lazy conflict resolution design. This design highlights how, with modest extensions to existing directory-based coherence protocols, information regarding possible conflicts can be effectively used to achieve true parallelism at commit without burdening the common-case. We leverage the observation that contention is typically seen on only a small fraction of shared data accessed by coarse-grained transactions. Pessimistic invalidation of such lines when committing or aborting, therefore, enables fast common-case execution. Our results show that. pi-TM performs consistently well and, in particular, far better than previous work on early conflict detection in lazy HTM. We also identify a pathological scenario that lazy designs with early conflict detection suffer from and propose a simple hardware workaround to sidestep it.
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| 7. |
- Negi, Anurag, 1980, et al.
(author)
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Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory
- 2011
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In: Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT. - 1089-795X. - 9780769545660 ; :Article number 6113816, s. 203-204
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Conference paper (peer-reviewed)abstract
- Lazy hardware transactional memory (HTM) allows better utilization of available concurrency in transactional workloads than eager HTM, but poses challenges at commit time due to the requirement of en-masse publication of speculative updates to global system state. Early conflict detection can be employed in lazy HTM designs to allow nonconflicting transactions to commit in parallel. Though this has the potential to improve performance, it has not been utilized effectively so far. Prior work in the area burdens common-case transactional execution severely to avoid some relatively uncommon correctness concerns. In this work we investigate this problem and introduce a novel design, π-TM, which eliminates this problem. π-TM uses modest extensions to existing directory-based cache coherence protocols to keep a record of conflicting cache lines as a transaction executes. This information allows a consistent cache state to be maintained when transactions commit or abort. We observe that contention is typically seen only on a small fraction of shared data accessed by coarse-grained transactions. In π-TM early conflict detection mechanisms imply additional work only when such contention actually exists. Thus, the design is able to avoid expensive core-to-core and core-to-directory communication for a large part of transactionally accessed data. Our evalutation shows major performance gains when compared to other HTM designs in this class and competitive performance when compared to more complex lazy commit schemes.
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| 8. |
- Negi, Anurag, 1980, et al.
(author)
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The impact of non-coherent buffers on lazy hardware transactional memory systems
- 2011
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In: IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum, 25th IEEE International Parallel and Distributed Processing Symposium, Workshops and Phd Forum, IPDPSW 2011; Anchorage, AK; 16 May 2011 through 20 May 2011. - 9780769543857 ; , s. 700-707
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Conference paper (peer-reviewed)abstract
- When supported in silicon, transactional memory (TM) promises to become a fast, simple and scalable parallel programming paradigm for future shared memory multiprocessor systems. Among the multitude of hardware TM design points and policies that have been studied so far, lazy conflict resolution designs often extract the most concurrency, but their inherent need for lazy versioning requires careful management of speculative updates. In this paper we study how coherent buffering, in private caches for example, as has been proposed in several hardware TM proposals, can lead to inefficiencies. We then show how such inefficiencies can be substantially mitigated by using complete or partial non-coherent buffering of speculative writes in dedicated structures or suitably adapted standard per-core write-buffers. These benefits are particularly noticeable in scenarios involving large coarse grained transactions that may write a lot of non-contended data in addition to actively shared data. We believe our analysis provides important insights into some overlooked aspects of TM behaviour and would prove useful to designers wishing to implement lazy TM schemes in hardware. © 2011 IEEE.
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| 10. |
- Pfeffer, M. A., et al.
(author)
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SO 2 emission rates and incorporation into the air pollution dispersion forecast during the 2021 eruption of Fagradalsfjall, Iceland
- 2024
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In: Journal of Volcanology and Geothermal Research. - 0377-0273. ; 449
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Journal article (peer-reviewed)abstract
- During the low-effusion rate Fagradalsfjall eruption (19 March – 18 September 2021), the emission of sulfur dioxide (SO2) was frequently measured using ground-based UV spectrometers. The total SO2 emitted during the entire eruption was 970 ± 540 kt, which is only about 6% of the SO2 emitted during the similar length Holuhraun eruption (2014–2015). The eruption was divided into five phases based on visual observations, including the number of active vents and the occurrence of lava fountaining. The SO2 emission rate ranged from 44 ± 19 kg/s in Phase 2 to 85 ± 29 kg/s in Phase 5, with an average of 64 ± 34 kg/s for the entire eruption. There was notable variability in SO2 on short timescales, with measurements on 11 August 2021 ranging from 17 to 78 kg/s. SO2 flux measurements were made using scanning DOAS instruments located at different distances from and orientations relative to the eruption site augmented by traverses. Four hundred and forty-four scan and traverse measurements met quality criteria and were used, along with plume height and meteorological data, to calculate SO2 fluxes while accounting for wind-related uncertainties. A tendency for stronger SO2 flux concurrent with higher amplitude seismic tremor and the occurrence of lava fountaining was observed during Phases 4 and 5 which were characterized by intermittent crater activity including observable effusion of lava and gas release interspersed with long repose times. This tendency was used to refine the calculation of the amount of SO2 emitted during variably vigorous activity. The continuous seismic tremor time series was used to quantify how long during these eruption phases strong/weak activity was exhibited to improve the calculated SO2 flux during these Phases. The total SO2 emissions derived from field measurements align closely with results obtained by combining melt inclusion and groundmass glass analyses with lava effusion rate measurements (910 ± 230 kt SO2). Specifically, utilizing the maximum S content found in evolved melt inclusions and the least remaining S content in accompanying quenched groundmasses provides an identical result between field measurements and the petrological calculations. This suggests that the maximum SO2 release calculated from petrological estimates should be preferentially used to initialize gas dispersion models for basaltic eruptions when other measurements are lacking. During the eruption, the CALPUFF dispersion model was used to forecast ground-level exposure to SO2. The SO2 emission rates measured by DOAS were used as input for the dispersion model, with updates made when a significant change was measured. A detailed analysis of one mid-distance station over the entire eruption shows that the model performed very well at predicting the presence of volcanic SO2 when it was measured. However, it frequently predicted the presence of SO2 that was not measured and the concentrations forecasted had no correlation with the concentrations measured. Various approaches to improve the model forecast were tested, including updating plume height and SO2 flux source terms based on measurements. These approaches did not unambiguously improve the model performance but suggest that improvements might be achieved in more-polluted conditions.
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