| 1. |
- Gottlob, H. D. B., et al.
(författare)
-
0.86-nm CET gate stacks with epitaxial Gd2O3 high-k dielectrics and FUSINiSi metal electrodes
- 2006
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Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:10, s. 814-816
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Tidskriftsartikel (refereegranskat)abstract
- In this letter, ultrathin gadolinium oxide (Gd2O3) high-kappa gate dielectrics with complementary-metal-oxide-semiconductor (CMOS)-compatible fully silicided nickel-silicide metal gate electrodes are reported for the first time. MOS capacitors with a Gd2O3 thickness of 3.1 nm yield a capacitance equivalent oxide thickness of CET = 0.86 nm. The extracted dielectric constant is kappa =-13-14. Leakage currents and equivalent oxide thicknesses of this novel gate stack meet the International Technology Roadmap for Semiconductors targets for the near term schedule and beyond.
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| 2. |
- Gottlob, H. D. B., et al.
(författare)
-
CMOS integration of epitaxial Gd(2)O(3) high-k gate dielectrics
- 2006
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 50:6, s. 979-985
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Tidskriftsartikel (refereegranskat)abstract
- Epitaxial gadolinium oxide (Gd(2)O(3)) high-k dielectrics are investigated with respect to their CMOS compatibility in metal oxide semiconductor (MOS) capacitors and field effect transistors (MOSFETs). MOS capacitors with various gate electrodes are exposed to typical CMOS process steps and evaluated with capacitance voltage (CV) and current voltage (JV) measurements. The effects of high temperature processes on thermal stabilities of channel/dielectric and dielectric/gate electrode interfaces is studied in detail. A feasible CMOS process with epitaxial gate oxides and metal gate electrodes is identified and demonstrated by a fully functional n-MOSFET for the first time.
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| 3. |
- Echtermeyer, T., et al.
(författare)
-
Investigation of MOS capacitors and SOI-MOSFETs with epitaxial gadolinium oxide (Gd2O3) and titanium nitride (TiN) electrodes
- 2007
-
Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 51:4, s. 617-621
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Tidskriftsartikel (refereegranskat)abstract
- Electrical properties of metal oxide semiconductor (MOS) capacitors with gate stacks of epitaxial gadolinium oxide (Gd2O3) and titanium nitride (TiN) are studied. The influence of CMOS compatible rapid thermal annealing on these gate stacks is examined. Finally, n- and p-type MOS-field effect transistors (MOSFETs) on silicon on insulator (SOI) material with epitaxial Gd2O3 and TiN gate electrodes are presented.
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| 4. |
- Gottlob, H. D. B., et al.
(författare)
-
Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics
- 2006
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Ingår i: ESSDERC 2006. - 9781424403011 ; , s. 150-153
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Konferensbidrag (refereegranskat)abstract
- Two process concepts for integration of novel gate stacks with epitaxial high-K dielectrics and metal gate electrodes are presented. A "gate first" process based on a planar gate stack on ultra thin SOI material has been used for successful fabrication of MOSFETs with TiN/Gd2O3 gate stack. Furthermore MOSFETs with W/Gd2O3 gate stack have been fabricated with a replacement gate process. This is the first successful attempt to integrate crystalline high-K dielectrics into a "gentle" damascene metal gate process in order to reduce process induced oxide damages.
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| 5. |
- Gottlob, H. D. B., et al.
(författare)
-
Investigation of high-K gate stacks with epitaxial Gd(2)O(3) and FUSINiSi metal gates down to CET=0.86 nm
- 2006
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Ingår i: Materials Science in Semiconductor Processing. - : Elsevier BV. - 1369-8001 .- 1873-4081. ; 9:6, s. 904-908
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Tidskriftsartikel (refereegranskat)abstract
- Novel gate stacks with epitaxial gadoliniurn oxide (Gd(2)O(3)) high-k dielectrics and fully silicided (FUSI) nickel silicide (NiSi) gate electrodes are investigated. Ultra-low leakage current densities down to 10(-7) A cm(-2) are observed at a capacitance equivalent oxide thickness of CET = 1.8 nm. The influence of a titanium nitride (TiN) capping layer during silicidation is studied. Furthermore, films with an ultra-thin CET of 0.86 nm at a Gd(2)O(3) thickness of 3.1 nm yield current densities down to 0.5 A cm(-2) at V(g) = + 1 V. The extracted dielectric constant for these gate stacks ranges from k = 13 to 14. These results emphasize the potential of NiSi/Gd(2)O(3) gate stacks for future material-based scaling of CMOS technology.
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| 6. |
- Gottlob, H. D. B., et al.
(författare)
-
Leakage current mechanisms in epitaxial Gd(2)O(3) high-k gate dielectrics
- 2008
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Ingår i: Electrochemical and solid-state letters. - : The Electrochemical Society. - 1099-0062 .- 1944-8775. ; 11:3, s. G12-G14
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Tidskriftsartikel (refereegranskat)abstract
- We report on leakage current mechanisms in epitaxial gadolinium oxide (Gd(2)O(3)) high-k gate dielectrics suitable for low standby power logic applications. The investigated p-type metal-oxide-semi con doctor capacitors are gated with complementary-metal-oxide-semiconductor-compatible fully silicided nickel silicide electrodes. The Gd(2)O(3) thickness is 5.9 nm corresponding to a capacitance equivalent oxide thickness of 1.8 nm. Poole-Frenkel conduction is identified as the main leakage mechanism with the high-frequency permittivity describing the dielectric response on the carriers. A trap level of Phi(T) = 1.2 eV is extracted. The resulting band diagram strongly suggests hole conduction to be dominant over electron conduction.
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| 7. |
- Gottlob, H D B, et al.
(författare)
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Scalable gate first process for silicon on insulator metal oxide semiconductor field effect transistors with epitaxial high-k dielectrics
- 2006
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Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567. ; 24:2, s. 710-714
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Tidskriftsartikel (refereegranskat)abstract
- A "gate first" silicon on insulator (SOI) complementary metal oxide semiconductor process technology for direct evaluation of epitaxial gate dielectrics is described, where the gate stack is fabricated prior to any lithography or etching step. This sequence provides perfect silicon surfaces required for epitaxial growth. The inverted process flow with silicon dioxide (SiO2)/polysilicon gate stacks is demonstrated for gate lengths from 10 mu m down to 40 nm on a fully depleted 25 nm thin SOI film. The interface qualities at the front and back gates are investigated and compared to conventionally processed SOI devices. Furthermore, the subthreshold behavior is studied and the scalability of the gate first approach is proven by fully functional sub-100 nm transistors. Finally, a fully functional gate first metal oxide semiconductor field effect transistor with the epitaxial high-k gate dielectric gadolinium oxide (Gd2O3) and titanium nitride (TiN) gate electrode is presented.
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| 8. |
- Lemme, Max C., 1970-, et al.
(författare)
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Mobility in graphene double gate field effect transistors
- 2008
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Ingår i: Solid-State Electronics. - : PERGAMON-ELSEVIER SCIENCE LTD. - 0038-1101 .- 1879-2405. ; 52:4, s. 514-518
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Tidskriftsartikel (refereegranskat)abstract
- In this work, double-gated field effect transistors manufactured from monolayer graphene are investigated. Conventional top-down CMOS-compatible processes are applied except for graphene deposition by manual exfoliation. Carrier mobilities in single- and double-gated graphene field effect transistors are compared. Even in double-gated graphene FETs, the carrier mobility exceeds the universal mobility of silicon over nearly the entire measured range. At comparable dimensions, reported mobilities for ultra-thin body silicon-on-insulator MOSFETs cannot compete with graphene FET values. (c) 2007 Elsevier Ltd. All rights reserved.
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| 9. |
- Echtermeyer, T. J., et al.
(författare)
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Graphene field-effect devices
- 2007
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Ingår i: The European Physical Journal Special Topics. - : Springer Science and Business Media LLC. - 1951-6355 .- 1951-6401. ; 148:1, s. 19-26
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Tidskriftsartikel (refereegranskat)abstract
- In this article, graphene is investigated with respect to its electronic properties when introduced into field effect devices ( FED). With the exception of manual graphene deposition, conventional top-down CMOS-compatible processes are applied. Few and monolayer graphene sheets are characterized by scanning electron microscopy, atomic force microscopy and Raman spectroscopy. The electrical properties of monolayer graphene sandwiched between two silicon dioxide films are studied. Carrier mobilities in graphene pseudo-MOS structures are compared to those obtained from double-gated Graphene-FEDs and silicon metal-oxide-semiconductor field-effect-transistors ( MOSFETs).
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| 10. |
- Gottlob, H. D. B., et al.
(författare)
-
Gentle FUSI NiSi metal gate process for high-k dielectric screening
- 2008
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Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 85:10, s. 2019-2021
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Tidskriftsartikel (refereegranskat)abstract
- In this paper, a process flow well suited for screening of novel high-k dielectrics is presented. In vacuo silicon capping of the dielectrics excludes process and handling induced influences especially if hygroscopic materials are investigated. A gentle, low thermal budget process is demonstrated to form metal gate electrodes by turning the silicon capping into a fully silicided nickel silicide. This process enables the investigation of rare earth oxide based high-k dielectrics and specifically their intrinsic material properties using metal oxide semiconductor (MOS) capacitors. We demonstrate the formation of nickel monosilicide electrodes which show smooth interfaces to the lanthanum- and gadolinium-based high-k oxide films. The dielectrics have equivalent oxide thicknesses of EOT = 0.95 nm (lanthanum silicate) and EOT = 0.6 nm (epitaxial gadolinium oxide).
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| 11. |
- Lemme, Max C., 1970-, et al.
(författare)
-
Complementary metal oxide semiconductor integration of epitaxial Gd(2)O(3)
- 2009
-
Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567. ; 27:1, s. 258-261
-
Tidskriftsartikel (refereegranskat)abstract
- In this paper, epitaxial gadolinium oxide (Gd(2)O(3)) is reviewed as a potential high-K gate dielectric, both "as deposited" by molecular beam epitaxy as well as after integration into complementary metal oxide semiconductor (CMOS) processes. The material shows promising intrinsic properties, meeting critical ITRS targets for leakage current densities even at subnanometer equivalent oxide thicknesses. These epitaxial oxides can be integrated into a CMOS platform by a "gentle" replacement gate process. While high temperature processing potentially degrades the material, a route toward thermally stable epitaxial Gd(2)O(3) gate dielectrics is explored by carefully controlling the annealing conditions.
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| 12. |
- Mashoff, T., et al.
(författare)
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Bistability and Oscillatory Motion of Natural Nanomembranes Appearing within Monolayer Graphene on Silicon Dioxide
- 2010
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Ingår i: Nano letters (Print). - : American Chemical Society (ACS). - 1530-6984 .- 1530-6992. ; 10:2, s. 461-465
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Tidskriftsartikel (refereegranskat)abstract
- The truly two-dimensional material graphene is an ideal candidate for nanoelectromechanics due to its large strength and mobility. Here we show that graphene flakes provide natural nanomembranes of diameter down to 3 nm within its intrinsic rippling. The membranes can be lifted either reversibly or hysteretically by the tip of a scanning tunneling microscope. The clamped-membrane model including van-der-Waals and dielectric forces explains the results quantitatively. AC-fields oscillate the membranes, which might lead to a completely novel approach to controlled quantized oscillations or single atom mass detection.
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| 13. |
- Baus, M., et al.
(författare)
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Device architectures based on graphene channels
- 2008
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Ingår i: 2008 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS. - NEW YORK : IEEE. ; , s. 269-272
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Konferensbidrag (refereegranskat)abstract
- Graphene is a possible candidate for advanced channel materials in future field effect transistors. This presentation gives a brief overview about recent experimental results in the field of graphene transistors for future electronic applications.
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