| 1. |
- Ayatolahi, Fatemeh, 1984, et al.
(författare)
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A study of the impact of single bit-flip and double bit-flip errors on program execution
- 2013
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Ingår i: Lect. Notes Comput. Sci.. - Berlin, Heidelberg : Springer Berlin Heidelberg. - 9783642407925 ; , s. 265-276
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Konferensbidrag (refereegranskat)abstract
- This paper presents the results of an extensive experimental study of bit-flip errors in instruction set architecture registers and main memory locations. Comprising more than two million fault injection experiments conducted with thirteen benchmark programs, the study provides insights on whether it is necessary to consider double bit-flip errors in dependability benchmarking experiments. The results show that the proportion of silent data corruptions in the program output, is almost the same for single and double bit errors. In addition, we present detailed statistics about the error sensitivity of different target registers and memory locations, including bit positions within registers and memory words. These show that the error sensitivity varies significantly between different bit positions and registers. An important observation is that injections in certain bit positions always have the same impact regardless of when the error is injected.
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| 2. |
- Di Leo, D., et al.
(författare)
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On the impact of hardware faults - An investigation of the relationship between workload inputs and failure mode distributions
- 2012
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Ingår i: Lect. Notes Comput. Sci.. - Berlin, Heidelberg : Springer Berlin Heidelberg. - 1611-3349 .- 0302-9743. - 9783642336775 ; , s. 198-209
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Konferensbidrag (refereegranskat)abstract
- Technology scaling of integrated circuits is making transistors increasingly sensitive to process variations, wear-out effects and ionizing particles. This may lead to an increasing rate of transient and intermittent errors in future microprocessors. In order to assess the risk such errors pose to safety critical systems, it is essential to investigate how temporary errors in the instruction set architecture (ISA) registers and main memory locations influence the behaviour of executing programs. To this end, we investigate - by means of extensive fault injection experiments - how such errors affect the execution of four target programs. The paper makes three contributions. First, we investigate how the failure modes of the target programs vary for different input sets. Second, we evaluate the error coverage of a software-implemented hardware fault tolerant technique that relies on triple-time redundant execution, majority voting and forward recovery. Third, we propose an approach based on assembly language metrics which can be used to correlate the dynamic fault-free behaviour of a program with its failure mode distribution obtained by fault injection.
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| 3. |
- Pyddoke, Roger, 1956-, et al.
(författare)
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Trängsel och knapphet på väg, järnväg och i kollektivtrafik : delstudie inom SAMKOST
- 2014
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Rapport (övrigt vetenskapligt/konstnärligt)abstract
- Syftet med denna studie är att göra en inventering av data och genomförda studier som skulle kunna ligga till grund för marginalkostnadsberäkningar av trängsel på väg och knapphet på järnvägskapacitet. Vidare kommenteras metodutveckling för att uppskatta och värdera trängsel i kollektivtrafik. Trafikverkets utredning från 2013 indikerar att det finns kvarstående trängselproblem i Stockholm som skulle påverkas med justeringar av tullsnitt, nivåer och en differentiering av trängselsskattesatser med avseende på tid och plats. I studien kvantifierades trängsel i vägnätet utanför tätorter genom att använda omfattande flödes- och hastighetsmätningar från E4 söder om Stockholm som exempel. Detta val av vägsträcka motiveras av att det är en högt trafikerad sträcka där hastighetsminskningar uppstår regelbundet. Resultaten innebär att flödena under maj till december 2013 regelbundet underskred 60 kilometer i timmen långa perioder. Marginalkostnaden av trängsel kan utryckas som förändringen i kostnad vid förändring i densitet och är som högst vid densiteter nära vägens kapacitet. När densiteten är som störst är marginalkostnaden för ytterligare en bil cirka 10 kronor per kilometer. Jämfört med skatterna på bensin, vilka uppgår till cirka 34 öre per kilometer och som anses täcka marginalkostnaderna för alla andra externaliteter inklusive koldioxidutsläppen, kan därmed trängselkostnaderna sägas vara betydande. För tåglägen har denna studie använt Trafikverkets elektroniska dokumentation av operatörers ansökningar om tåglägen för det nationella tågplanearbetet för 2013 och motsvarande dokumentation av beslutade tåglägen. Vi finner att totalt tilldelade tåglägen för SJ utgör 99 procent av sökta och för Green Cargo 97 procent. Detta utgör inte en stark indikation på knapphet. För trängsel i kollektivtrafik finns ett antal brittiska studier av värderingen av trängsel vid tågresor. Dessa värderingar har mestadels beräknats som en multiplikativ faktor för tidsvärden när resenärerna reser utan trängsel. I rapporten redovisas studier som visar att betalningsviljan kan vara betydligt högre för en kortare restid om resan sker i trängsel.
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| 4. |
- Sangchoolie, Behrooz, et al.
(författare)
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A study of the impact of bit-flip errors on programs compiled with different optimization levels
- 2014
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Ingår i: Proceedings - 2014 10th European Dependable Computing Conference, EDCC 2014. - : IEEE Computer Society. - 9781479938032 ; , s. 146-157
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Konferensbidrag (refereegranskat)abstract
- In this paper we study the impact of compiler optimizations on the error sensitivity of twelve benchmark programs. We conducted extensive fault injection experiments where bit-flip errors were injected in instruction set architecture registers and main memory locations. The results show that the percentage of silent data corruptions (SDCs) in the output of the optimized programs is only marginally higher compare to that observed for the non-optimized programs. This suggests that compiler optimizations can be used in safety- and mission-critical systems without increasing the risk that the system produces undetected erroneous outputs. In addition, we investigate to what extent the source code implementation of a program affects the error sensitivity of a program. To this end, we perform experiments with five implementations of a bit count algorithm. In this investigation, we consider the impact of the implementation as well as compiler optimizations. The results of these experiments give valuable insights into how compiler optimizations can be used to reduce error sensitive of registers and main memory sections. They also show how sensitive locations requiring additional protection, e.g., by the use of software-based fault tolerance techniques, can be identified.
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| 5. |
- Sangchoolie, Behrooz, 1986, et al.
(författare)
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Benchmarking the Hardware Error Sensitivity of Machine Instructions
- 2013
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Ingår i: Proceedings of the 2013 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 9).
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Konferensbidrag (refereegranskat)abstract
- This paper presents the results of an extensive fault injection study of the impact of processor faults that manifest as bit flip errors in instruction set architecture registers and main memory locations. The aim is to investigate if bit errors that propagate to the source registers or memory locations of a given class of machine instructions have a similar probability of generating undetected value failures (i.e., silent data corruptions) for different programs. The results show a fairly large variation in the error sensitivity over different programs for all classes of machine instructions, which indicates that the effectiveness of error mitigation techniques that target specific machine instructions may vary significantly for different programs.
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| 6. |
- Ahlgren, Kerstin M., et al.
(författare)
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Increased IL-17A secretion in response to Candida albicans in autoimmune polyendocrine syndrome type 1 and its animal model
- 2011
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Ingår i: European Journal of Immunology. - : Wiley. - 0014-2980 .- 1521-4141. ; 41:1, s. 235-245
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Tidskriftsartikel (refereegranskat)abstract
- Autoimmune polyendocrine syndrome type 1 (APS-1) is a multiorgan autoimmune disease caused by mutations in the autoimmune regulator (AIRE) gene. Chronic mucocutaneous candidiasis, hypoparathyroidism and adrenal failure are hallmarks of the disease. The critical mechanisms causing chronic mucocutaneous candidiasis in APS-1 patients have not been identified although autoantibodies to cytokines are implicated in the pathogenesis. To investigate whether the Th reactivity to Candida albicans (C. albicans) and other stimuli was altered, we isolated PBMC from APS-1 patients and matched healthy controls. The Th17 pathway was upregulated in response to C. albicans in APS-1 patients, whereas the IL-22 secretion was reduced. Autoantibodies against IL-22, IL-17A and IL-17F were detected in sera from APS-1 patients by immunoprecipitation. In addition, Aire-deficient (Aire(0/0) ) mice were much more susceptible than Aire(+/+) mice to mucosal candidiasis and C. albicans-induced Th17- and Th1-cell responses were increased in Aire(0/0) mice. Thus an excessive IL-17A reactivity towards C. albicans was observed in APS-1 patients and Aire(0/0) mice.
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| 7. |
- Alexandersson, Ruben, 1975, et al.
(författare)
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Aspect-Oriented Implementation of Fault Tolerance: An Assessment of Overhead
- 2010
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Ingår i: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). - Berlin, Heidelberg : Springer Berlin Heidelberg. - 1611-3349 .- 0302-9743. - 9783642156502 ; 6351, s. 466-479
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Konferensbidrag (refereegranskat)abstract
- Software-implemented fault tolerance is an attractive technique for constructing fail-safe and fault-tolerant processing nodes for road vehicles and other cost-sensitive applications. This paper investigates the memoryconsumption and execution time overhead obtained when implementing timeredundant execution and control flow checking in software for an automotive brake controller application. These two mechanisms were implemented at thesource code level using three implementations techniques: aspect-oriented programming (AOP), source code transformation and manual programming in C. The results show that AOP generates much higher overheads than codetransformation for strictly systematic implementations. On the other hand, when application knowledge is used to optimize the implementations, the overhead ofAOP is similar to that of manual programming in C.
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| 8. |
- Alexandersson, Ruben, 1975, et al.
(författare)
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Fault injection-based assessment of aspect-oriented implementation of fault tolerance
- 2011
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Ingår i: 2011 IEEE/IFIP 41st International Conference on Dependable Systems and Networks, DSN 2011, Hong Kong, 27-30 June 2011. - 1530-0889. - 9781424492336 ; , s. 303-314
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Konferensbidrag (refereegranskat)abstract
- Aspect-oriented programming provides an interesting approach for implementing software-based fault tolerance as it allows the core functionality of a program and its fault tolerance features to be coded separately. This paper presents a comprehensive fault injection study that estimates the fault coverage of two software implemented fault tolerance mechanisms designed to detect or mask transient and intermittent hardware faults. We compare their fault coverage for two target programs and for three implementation techniques: manual programming in C and two variants of aspect-oriented programming. We also compare the impact of different compiler optimization levels on the fault coverage. The software-implemented fault tolerance mechanisms investigated are: i) triple time-redundant execution with voting and forward recovery, and ii) a novel dual signature control flow checking mechanism. The study shows that the variations in fault coverage among the implementation techniques generally are small, while some variations for different compiler optimization levels are significant.
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| 9. |
- Alexandersson, Ruben, 1975, et al.
(författare)
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Fault injection‐based assessment of aspect‐oriented fault tolerance
- 2010
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Rapport (övrigt vetenskapligt/konstnärligt)abstract
- Aspect‐oriented programming provides an interesting approach for implementing software‐based fault tolerance as it allows the core functionality of a program and its fault tolerance features to be coded separately. This paperpresents a comprehensive fault injection study that estimates the fault coverage of several software implemented fault tolerance mechanisms designed to detect or mask transient hardware faults. We compare their faultcoverage for two target programs and for three implementation techniques: manual programming in C and two variants of aspect‐oriented programming. We also compare the impact of different compiler optimization levels on thefault coverage. The software‐implemented fault tolerance mechanisms investigated are: i) triple time‐redundant execution with voting and forward recovery, ii) a novel dual signature control flow checking mechanism, and iii) anovel combination of several mechanisms that are shown to achieve perfect fault detection coverage for some of our target programs. The faults injected were single bit‐flips in memory words and instructions set architecture registers holding live data. The study shows that the variations in fault coverage among the implementation techniques generally are small, while it varies significantly (from 88% to 100%) for the different fault tolerance mechanisms.
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| 10. |
- Arlat, Jean, et al.
(författare)
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Fourth workshop on dependable and secure nanocomputing
- 2010
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Ingår i: Proceedings of the International Conference on Dependable Systems and Networks; 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2010; Chicago, IL; 28 June 2010 through 1 July 2010. - 9781424475018 ; , s. 619-620
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Konferensbidrag (refereegranskat)abstract
- Nanocomputing technologies hold the promise for higher performance, lower power consumption as well as increased functionality. However, the dependability of these unprecedentedly small scale devices remains uncertain. The main sources of concern are: • Nanometer devices are expected to be highly sensitive to process variations. The guard-bands used today for avoiding the impact of such variations will not represent a feasible solution in the future. Thus, timing errors may occur more frequently. • New failure modes, specific to new materials, are expected to raise serious challenges to the design and test engineers. • Environment induced errors, like single event upsets (SED), are likely to occur more frequently than in the case of conventional semiconductor devices. • New hardware redundancy techniques are needed to enable development of energy efficient systems. • The increased complexity of the systems based on nanotechnology will require improved computer aided design (CAD) tools, as well as better validation techniques. • Security of nanocomputing systems may be threatened by malicious attacks targeting new vulnerable areas in the hardware. © 2010 IEEE.
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