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Fully Depleted UTB ...
Fully Depleted UTB and Trigate N-Channel MOSFETs Featuring Low-Temperature PtSi Schottky-Barrier Contacts With Dopant Segregation
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- Gudmundsson, Valur (author)
- KTH,Integrerade komponenter och kretsar
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- Hellström, Per-Erik (author)
- KTH,Integrerade komponenter och kretsar
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- Luo, Jun (author)
- Uppsala universitet,KTH,Integrerade komponenter och kretsar,Tillämpad materialvetenskap
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- Lu, Jun (author)
- Uppsala universitet,Institutionen för teknikvetenskaper
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- Zhang, Shi-Li (author)
- Uppsala universitet,KTH,Integrerade komponenter och kretsar,Fasta tillståndets elektronik
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- Östling, Mikael (author)
- KTH,Integrerade komponenter och kretsar
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(creator_code:org_t)
- 2009
- 2009
- English.
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In: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 30:5, s. 541-543
- Related links:
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https://urn.kb.se/re...
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https://doi.org/10.1...
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https://urn.kb.se/re...
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Abstract
Subject headings
Close
- Schottky-barrier source/drain (SB-S/D) presents a promising solution to reducing parasitic resistance for device architectures such as fully depleted UTB, trigate, or FinFET. In this letter, a low-temperature process (<= 700 degrees C) with PtSi-based S/D is examined for the fabrication of n-type UTB and trigate FETs on SOI substrate (t(si) = 30 nm). Dopant segregation with As was used to achieve the n-type behavior at implantation doses of 1 (.) 10(15) and 5. 10(15) cm(-2). Similar results were found for UTB devices with both doses, but trigate devices with the larger dose exhibited higher on currents and smaller process variation than their lower dose counterparts.
Keyword
- Dopant segregation (DS)
- FinFET
- platinum silicide PtSi
- Schottky-barrier (SB)-MOSFET
- trigate
- YTTERBIUM SILICIDE
- SOURCE/DRAIN
- TECHNOLOGY
- TECHNOLOGY
Publication and Content Type
- ref (subject category)
- art (subject category)
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