Models and Methods for Development of DSP Applications on Manycore Processors

↓ Direkt till sidans innehåll
↓ Direkt till sidans sekundära innehåll (sidomenyn)

Sökning: WFRF:(Svensson Bertil) > Models and Methods ...

Bengtsson, JerkerHögskolan i Halmstad,Centrum för forskning om inbyggda system (CERES),Chalmers tekniska högskola,Chalmers University of Technology (författare)

Models and Methods for Development of DSP Applications on Manycore Processors

BokEngelska2009

Förlag, utgivningsår, omfång ...

Göteborg :Chalmers University of Technology,2009
173 s.
electronicrdacarrier

Nummerbeteckningar

LIBRIS-ID:oai:DiVA.org:hh-14706
ISBN:9789173852883
https://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-14706URI
https://research.chalmers.se/publication/93954URI

Kompletterande språkuppgifter

Språk:engelska
Sammanfattning på:engelska

Ingår i deldatabas

SwePubSwePub

Klassifikation

Ämneskategori:vet swepub-contenttype
Ämneskategori:dok swepub-publicationtype

Serie

Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie,0346-718X ;2969

Anmärkningar

Advanced digital signal processing systems require specialized high-performance embedded computer architectures. The term high-performance translates to large amounts of data and computations per time unit. The term embedded further implies requirements on physical size and power efficiency. Thus the requirements are of both functional and non-functional nature. This thesis addresses the development of high-performance digital signal processing systems relying on manycore technology. We propose building two-level hierarchical computer architectures for this domain of applications. Further, we outline a tool flow based on methods and analysis techniques for automated, multi-objective mapping of such applications on distributed memory manycore processors. In particular, the focus is put on how to provide a means for tunable strategies for mapping of task graphs on array structured distributed memory manycores, with respect to given application constraints. We argue for code mapping strategies based on predicted execution performance, which can be used in an auto-tuning feedback loop or to guide manual tuning directed by the programmer. Automated parallelization, optimisation and mapping to a manycore processor benefits from the use of a concurrent programming model as the starting point. Such a model allows the programmer to express different types and granularities of parallelism as well as computation characteristics of importance in the addressed class of applications. The programming model should also abstract away machine dependent hardware details. The analytical study of WCDMA baseband processing in radio base stations, presented in this thesis, suggests dataflow models as a good match to the characteristics of the application and as execution model abstracting computations on a manycore. Construction of portable tools further requires a manycore machine model and an intermediate representation. The models are needed in order to decouple algorithms, used to transform and map application software, from hardware. We propose a manycore machine model that captures common hardware resources, as well as resource dependent performance metrics for parallel computation and communication. Further, we have developed a multifunctional intermediate representation, which can be used as source for code generation and for dynamic execution analysis. Finally, we demonstrate how we can dynamically analyse execution using abstract interpretation on the intermediate representation. It is shown that the performance predictions can be used to accurately rank different mappings by best throughput or shortest end-to-end computation latency.

Ämnesord och genrebeteckningar

NATURVETENSKAP Data- och informationsvetenskap Datorteknik hsv//swe
NATURAL SCIENCES Computer and Information Sciences Computer Engineering hsv//eng
parallel processing
manycore processors
high-performance digital signal processing
dataflow
concurrent models of computation
parallel code mapping
parallel machine model
dynamic performance analysis
Computer engineering
Datorteknik

Biuppslag (personer, institutioner, konferenser, titlar ...)

Svensson, Bertil,ProfessorHögskolan i Halmstad,Centrum för forskning om inbyggda system (CERES) (preses)
Bhattacharyya, Shuvra S.,ProfessorDept. of Electrical and Computer Engineering, University of Maryland, USA (opponent)
Högskolan i HalmstadCentrum för forskning om inbyggda system (CERES) (creator_code:org_t)

Internetlänk

Hitta via bibliotek

Models and Methods for Development of DSP Applications on Manycore Processors (Sök publikationen i LIBRIS)

Till lärosätets databas

Hitta mer i SwePub

Av författaren/redakt...: Bengtsson, Jerke ...; Svensson, Bertil ...; Bhattacharyya, S ...

Om ämnet

NATURVETENSKAP: NATURVETENSKAP; och Data och informa ...; och Datorteknik

Delar i serien: Doktorsavhandlin ...

Av lärosätet: Högskolan i Halmstad; Chalmers tekniska högskola

Sök utanför SwePub

Sök vidare i:: Google; Google Book Search; Google Scholar

Kungliga biblioteket hanterar dina personuppgifter i enlighet med EU:s dataskyddsförordning (2018), GDPR. Läs mer om hur det funkar här.
Så här hanterar KB dina uppgifter vid användning av denna tjänst.

LIBRIS.kb.se