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Deadlock Free Routing in Mesh Networks on Chip with Regions

Holsmark, Rickard, 1970- (author)
Linköpings universitet,Jönköping University,JTH. Forskningsområde Robusta inbyggda system,Institutionen för datavetenskap,Tekniska högskolan
Kumar, Shashi, Professor (thesis advisor)
Jönköping University,JTH. Forskningsområde Robusta inbyggda system,Embedded Systems, Department of Electronics and Computer Engineering, School of Engineering, Jönköping University
Eles, Petru, Professor (thesis advisor)
Linköpings universitet,Institutionen för datavetenskap,Tekniska högskolan
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Jantsch, Axel, Professor (opponent)
KTH,Elektroniksystem, Tekniska högskolan, Stockholm, Sweden
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Jönköping University JTH Forskningsområde Robusta inbyggda system (creator_code:org_t)
ISBN 9789173935593
Linköping : Linköping University Electronic Press, 2009
English 127 s.
Series: Linköping Studies in Science and Technology, 0280-7971 ; 1410
  • Licentiate thesis (other academic/artistic)
Abstract Subject headings
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  • There is a seemingly endless miniaturization of electronic components, which has enabled designers to build sophisticated computing structureson silicon chips. Consequently, electronic systems are continuously improving with new and more advanced functionalities. Design complexity ofthese Systems on Chip (SoC) is reduced by the use of pre-designed cores. However, several problems related to the interconnection of coresremain. Network on Chip (NoC) is a new SoC design paradigm, which targets the interconnect problems using classical network concepts. Still,SoC cores show large variance in size and functionality, whereas several NoC benefits relate to regularity and homogeneity. This thesis studies some network aspects which are characteristic to NoC systems. One is the issue of area wastage in NoC due to cores of varioussizes. We elaborate on using oversized regions in regular mesh NoC and identify several new design possibilities. Adverse effects of regions oncommunication are outlined and evaluated by simulation. Deadlock freedom is an important region issue, since it affects both the usability and performance of routing algorithms. The concept of faultyblocks, used in deadlock free fault-tolerant routing algorithms has similarities with rectangular regions. We have improved and adopted one suchalgorithm to provide deadlock free routing in NoC with regions. This work also offers a methodology for designing topology agnostic, deadlockfree, highly adaptive application specific routing algorithms. The methodology exploits information about communication among tasks of anapplication. This is used in the analysis of deadlock freedom, such that fewer deadlock preventing routing restrictions are required. A comparative study of the two proposed routing algorithms shows that the application specific algorithm gives significantly higher performance.But, the fault-tolerant algorithm may be preferred for systems requiring support for general communication. Several extensions to our work areproposed, for example in areas such as core mapping and efficient routing algorithms. The region concept can be extended for supporting reuse ofa pre-designed NoC as a component in a larger hierarchical NoC.

Subject headings

NATURVETENSKAP  -- Data- och informationsvetenskap -- Systemvetenskap, informationssystem och informatik (hsv//swe)
NATURAL SCIENCES  -- Computer and Information Sciences -- Information Systems (hsv//eng)

Keyword

Networks on Chip
Mesh Topology
Routing Algorithms
Wormhole Switching
Deadlock
Application Specific Routing
Systems engineering
Systemteknik
TECHNOLOGY

Publication and Content Type

vet (subject category)
lic (subject category)

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