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Two-step continuous-time incremental sigma-delta ADC

Tao, Sha (author)
KTH,Integrerade komponenter och kretsar
Rodriguez Duenas, Saul (author)
KTH,Integrerade komponenter och kretsar
Rusu, Ana (author)
KTH,Integrerade komponenter och kretsar
 (creator_code:org_t)
2013-06
2013
English.
In: Electronics Letters. - : IEEE Press. - 0013-5194 .- 1350-911X. ; 49:12, s. 749-750
  • Journal article (peer-reviewed)
Abstract Subject headings
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  • A two-step continuous-time (CT) incremental sigma-delta (I Sigma Delta) ADC, which enhances the performance of conventional CT I Sigma Delta ADCs, is proposed. By pipelining two second-order CT I Sigma Delta ADCs, the proposed two-step architecture can achieve high resolution without sacrificing the conversion rate. Compared to other alternatives, the two-step CT I Sigma Delta ADC exhibits the freedom of adjusting its accuracy and speed independently while featuring quite relaxed circuit specifications.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Keyword

Circuit specifications
Continuoustime
Conversion rates
High resolution
Second orders
Sigma-delta
Sigma-delta ADC
SRA - ICT
SRA - Informations- och kommunikationsteknik

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ref (subject category)
art (subject category)

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Royal Institute of Technology

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