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Morphable Compression Architecture for Efficient Configuration in CGRAs

Jafri, Syed M. A. H. (författare)
KTH,Elektroniksystem,University of Turku, Finland
Tajammul, Adeel (författare)
KTH,Elektroniksystem
Daneshtalab, Masoud (författare)
KTH,Elektroniksystem,University of Turku, Finland
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Hemani, Ahmed (författare)
KTH,Elektroniksystem
Paul, Kolin (författare)
Indian Institute of Technology
Ellervee, Peeter (författare)
Plosila, Juha (författare)
KTH,Elektroniksystem,University of Turku, Finland
Tenhunen, Hannu (författare)
KTH,Elektroniksystem,University of Turku, Finland
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 (creator_code:org_t)
2014
2014
Engelska.
Ingår i: 2014 17th Euromicro Conference on Digital System Design (DSD). ; , s. 42-49
  • Konferensbidrag (refereegranskat)
Abstract Ämnesord
Stäng  
  • Today, Coarse Grained Reconfigurable Architectures (CGRAs) host multiple applications. Novel CGRAs allow each application to exploit runtime parallelism and time sharing. Although these features enhance the power and silicon efficiency, they significantly increase the configuration memory overheads (up to 50% area of the overall platform). As a solution to this problem researchers have employed statistical compression, intermediate compact representation, and multicasting. Each of these techniques has different properties (i.e. compression ratio and decoding time), and is therefore best suited for a particular class of applications (and situation). However, existing research only deals with these methods separately. In this paper we propose a morphable compression architecture that interleaves these techniques in a unique platform. The proposed architecture allows each application to enjoy a separate compression/decompression hierarchy (consisting of various types and implementations of hardware/software decoders) tailored to its needs. Thereby, our solution offers minimal memory while meeting the required configuration deadlines. Simulation results, using different applications (FFT, Matrix multiplication, and WLAN), reveal that the choice of compression hierarchy has a significant impact on compression ratio (from configware replication to 52%) and configuration cycles (from 33 nsec to 1.5 secs) for the tested applications. Synthesis results reveal that introducing adaptivity incurs negligible additional overheads (1%) compared to the overall platform area.

Ämnesord

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Nyckelord

Reconfigurable computing
Computer Science
Datalogi

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