Large scale integration of graphene transistors for potential applications in the back end of the line

QC 20150512
A chip to wafer scale, CMOS compatible method of graphene device fabrication has been established, which can be integrated into the back end of the line (BEOL) of conventional semiconductor process flows. In this paper, we present experimental results of graphene field effect transistors (GFETs) which were fabricated using this wafer scalable method. The carrier mobilities in these transistors reach up to several hundred cm(2) V-1 s(-1). Further, these devices exhibit current saturation regions similar to graphene devices fabricated using mechanical exfoliation. The overall performance of the GFETs can not yet compete with record values reported for devices based on mechanically exfoliated material. Nevertheless, this large scale approach is an important step towards reliability and variability studies as well as optimization of device aspects such as electrical contacts and dielectric interfaces with statistically relevant numbers of devices. It is also an important milestone towards introduting graphene into wafer scale process lines.

Vaziri, SamKTH,Integrerade komponenter och kretsar(Swepub:kth)u1y2zddt (författare)
Rodriguez, SaulKTH,Integrerade komponenter och kretsar(Swepub:kth)u1vuponf (författare)
Östling, MikaelKTH,Integrerade komponenter och kretsar(Swepub:kth)u1u0kle4 (författare)
Lemme, Max C.KTH,Integrerade komponenter och kretsar,University of Siegen, Germany(Swepub:kth)u1m2eozy (författare)
KTHIntegrerade komponenter och kretsar (creator_code:org_t)

Av författaren/redakt...: Smith, Anderson ...; Vaziri, Sam; Rodriguez, Saul; Östling, Mikael; Lemme, Max C.

Om ämnet

TEKNIK OCH TEKNOLOGIER: TEKNIK OCH TEKNO ...; och Elektroteknik oc ...; och Annan elektrotek ...

Kungliga biblioteket hanterar dina personuppgifter i enlighet med EU:s dataskyddsförordning (2018), GDPR. Läs mer om hur det funkar här.
Så här hanterar KB dina uppgifter vid användning av denna tjänst.