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- Pamunuwa, D. (author)
Modelling noise and delay in VLSI circuits
- Article/chapterEnglish2003
Publisher, publication year, extent ...
- Institution of Engineering and Technology (IET),2003
- printrdacarrier
Numbers
- LIBRIS-ID:oai:DiVA.org:kth-22320
- https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-22320URI
- https://doi.org/10.1049/el:20030208DOI
Supplementary language notes
- Language:English
- Summary in:English
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Notes
- QC 20100525
- New models for estimating delay and noise in VLSI circuits, based on closed form expressions for the first and second moment of the impulse response in coupled RC trees are reported. The effect of crosstalk on delay and noise can be accurately estimated with a complexity only marginally higher than the Elmore delay.
Subject headings and genre
- rc delay
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- Elassaad, S. (author)
- Tenhunen, HannuKTH,Mikroelektronik och informationsteknik, IMIT(Swepub:kth)u1wjjaxp (author)
- KTHMikroelektronik och informationsteknik, IMIT (creator_code:org_t)
Related titles
- In:Electronics Letters: Institution of Engineering and Technology (IET)39:3, s. 269-2710013-51941350-911X
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