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- Kobayashi, M. (author)
3C-SiC MOSFET with High Channel Mobility and CVD Gate Oxide
- Article/chapterEnglish2011
Publisher, publication year, extent ...
- 2011
- printrdacarrier
Numbers
- LIBRIS-ID:oai:DiVA.org:kth-32497
- https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-32497URI
- https://doi.org/10.4028/www.scientific.net/MSF.679-680.645DOI
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- Language:English
- Summary in:English
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- SwePubSwePub
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Notes
- QC 20110415
- 3C-SiC MOSFET with 200 cm2/Vs channel mobility was fabricated. High performance device processes were adopted, including room temperature implantation with resist mask, polysilicon-metal gates, aluminium interconnects with titanium and titanium nitride and a specially developed activation anneal at 1600°C in Ar to get a smooth 3C-SiC surface and hence the expected high channel mobility. CVD deposited oxide with post oxidation annealing was investigated to reduce unwanted oxide charges and hence to get a better gate oxide integrity compared to thermally grown oxides. 3C-SiC MOSFETs with 600 V blocking voltage and 10 A drain current were fabricated using the improved processes described above. The MOSFETs assembled with TO-220 PKG indicated specific on-resistances of 5 to 7 mΩcm2.
Subject headings and genre
- 3C-SiC
- Capacitance-Voltage Characteristics
- Channel Mobility
- CVD Deposited Oxide
- MOSFET
- On Resistance
- Post Oxidation Annealing
- TZDB
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- Uchida, H. (author)
- Minami, A. (author)
- Sakata, A. (author)
- Esteve, Romain (author)
- Schöner, A. (author)
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- In:Materials Science Forum679-680, s. 645-6480255-54761662-9752
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