Cryogenic performance of ultrathin oxide MOS capacitors with in situ doped p(+) poly-Si1-xGex and poly-Si gate materials

A low-temperature electrical characterization of ultrathin oxide MOS capacitors with p(+) poly-Si1-xGex and poly-Si gate is performed. The investigated structures are suitable for future nano-scaled high speed MOSFETs. The aim of this study is to compare the low-temperature performance of poly-Si1-xGex and poly-Si gate MOS structures in the nanoscale channel length regime. Apart from the significant change in the flat band voltage, the result shows that all the poly-Si and poly-Si1-xGex gated MOS structures exhibit two centres of polarity change (zero-temperature coefficients) in capacitance. The second polarity change leads to an exclusive phenomenon in these structures. The low-temperature capacitance is found to be less than high-temperature capacitance at strong accumulation and this is in contrast to what has been observed so far in metal-gated capacitors. It is also observed that the temperature dependence of the tunnelling current is only on the oxide thickness and not on the gate material used.

Myrberg, TChalmers (author)
Nour, OmerChalmers(Swepub:liu)omeno75 (author)
Willander, MagnusChalmers(Swepub:liu)magwi72 (author)
Lundgren, PChalmers (author)
Sveinbjörnsson, E ÖChalmers (author)
Ye, L LChalmers (author)
Thölen, AChalmers (author)
Caymax, MInteruniversity Microelectronics Centre (IMEC), Leuven, Belgium (author)
ChalmersInteruniversity Microelectronics Centre (IMEC), Leuven, Belgium (creator_code:org_t)

In:Semiconductor Science and Technology: Iop Publishing Ltd17:9, s. 942-9460268-12421361-6641

By the author/editor: Jacob, A P; Myrberg, T; Nour, Omer; Willander, Magnu ...; Lundgren, P; Sveinbjörnsson, ...; show more...; Ye, L L; Thölen, A; Caymax, M; show less...

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