VHDL implementation of feature-extraction algorithm for the PANDA electromagnetic calorimeter

• A simple, efficient, and robust feature-extraction algorithm, developed for the digital front-end electronics of the electromagnetic calorimeter of the PANDA spectrometer at FAIR, Darmstadt, is implemented in VHDL for a commercial 16 bit 100 MHz sampling ADC. The source-code is available as an open-source project and is adaptable for other projects and sampling ADCs. Best performance with different types of signal sources can be achieved through flexible parameter selection. The on-line data-processing in FPGA enables to construct an almost dead-time free data acquisition system which is successfully evaluated as a first step towards building a complete trigger-less readout chain. Prototype setups are studied to determine the dead-time of the implemented algorithm, the rate of false triggering, timing performance, and event correlations.

Ämnesord

NATURVETENSKAP  -- Fysik -- Subatomär fysik (hsv//swe)

NATURAL SCIENCES  -- Physical Sciences -- Subatomic Physics (hsv//eng)

Nyckelord

Electromagnetic calorimeter

Sampling ADC readout

Digital filtering

Feature extraction

Trigger-less readout chain

Physics

Fysik

Nuclear Physics

Kärnfysik

Publikations- och innehållstyp

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