Survivor path processing in Viterbi decoders using register exchange and traceforward

• This paper proposes a new class of hybrid VLSI architectures for survivor path processing to be used in Viterbi decoders. The architecture combines the benefits of register exchange and trace-forward algorithms, that is, low memory requirement and latency versus implementation efficiency. Based on a structural comparison, it becomes evident that the architecture can be efficiently applied to codes with a larger number of states where usually trace-back-based architectures, which increase latency, are dominant.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Keyword

(TB)

traceback

survivor path

convolutional codes

register exchange (RE)

traceforward (TF)

Viterbi decoder

VLSI

Publication and Content Type

art (subject category)

ref (subject category)